[gcc r13-6411] MIPS: Add buildtime option to set msa default

[Richard Sandiford <rsandifo@gcc.gnu.org>]

https://gcc.gnu.org/g:f2b846f1feb6a1bbca0b85d2db66b92787bc0891

commit r13-6411-gf2b846f1feb6a1bbca0b85d2db66b92787bc0891
Author: Junxian Zhu <zhujunxian@oss.cipunited.com>
Date:   Thu Mar 2 10:30:21 2023 +0000

    MIPS: Add buildtime option to set msa default
    
    Add buildtime option to decide whether will compiler build with `-mmsa` option default.
    
    gcc/ChangeLog:
            * config.gcc: add -with-{no-}msa build option.
            * config/mips/mips.h: Likewise.
            * doc/install.texi: Likewise.
    
    Signed-off-by: Junxian Zhu <zhujunxian@oss.cipunited.com>

Diff:
---
 gcc/config.gcc         | 19 +++++++++++++++++--
 gcc/config/mips/mips.h |  3 ++-
 gcc/doc/install.texi   |  8 ++++++++
 3 files changed, 27 insertions(+), 3 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index c070e6ecd2e..da3a6d3ba1f 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -4709,7 +4709,7 @@ case "${target}" in
 		;;
 
 	mips*-*-*)
-		supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4 compact-branches"
+		supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4 compact-branches msa"
 
 		case ${with_float} in
 		"" | soft | hard)
@@ -4871,6 +4871,21 @@ case "${target}" in
 			exit 1
 			;;
 		esac
+
+		case ${with_msa} in
+		yes)
+			with_msa=msa
+			;;
+		no)
+			with_msa=no-msa
+			;;
+		"")
+			;;
+		*)
+			echo "Unknown msa type used in --with-msa" 1>&2
+			exit 1
+			;;
+		esac
 		;;
 
 	loongarch*-*-*)
@@ -5815,7 +5830,7 @@ case ${target} in
 esac
 
 t=
-all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec compact-branches"
+all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4 isa_spec compact-branches msa"
 for option in $all_defaults
 do
 	eval "val=\$with_"`echo $option | sed s/-/_/g`
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index f664d3044e1..6daf6d37165 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -916,7 +916,8 @@ struct mips_cpu_info {
   {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" },			\
   {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \
   {"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" }, \
-  {"compact-branches", "%{!mcompact-branches=*:-mcompact-branches=%(VALUE)}" } \
+  {"compact-branches", "%{!mcompact-branches=*:-mcompact-branches=%(VALUE)}" }, \
+  {"msa", "%{!mmsa:%{!mno-msa:-m%(VALUE)}}" } \
 
 /* A spec that infers the:
    -mnan=2008 setting from a -mips argument,
diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi
index 47ea9ea462b..9133c8f8543 100644
--- a/gcc/doc/install.texi
+++ b/gcc/doc/install.texi
@@ -1653,6 +1653,14 @@ unfused is normally expected).  Disabling these instructions is the
 only way to ensure compatible code is generated; this will incur
 a performance penalty.
 
+@item --with-msa
+On MIPS targets, make @option{-mmsa} the default when no
+@option{-mno-msa} option is passed.
+
+@item --without-msa
+On MIPS targets, make @option{-mno-msa} the default when no
+@option{-mmsa} option is passed. This is the default.
+
 @item --with-mips-plt
 On MIPS targets, make use of copy relocations and PLTs.
 These features are extensions to the traditional