From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 495EF3858002; Fri, 10 Mar 2023 08:26:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 495EF3858002 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1678436783; bh=mJxNrVOkCARx1uhBV1LGVa2rJr9ObOplS/VR/yC6p/4=; h=From:To:Subject:Date:From; b=LVQiTgu7Bol5fABQsAVGK8YmnolgpUbsh8qfcrofJwrjH0lH+8jLeN5IF92SFIbv9 JEgpoiagI0ItDdd9VnfewLA83YhuzuVKP1RDnkq85PU+WZRJ36QGO+lD9WbMBXEi/f JgLyWy3HXnL6YrNWCG51VVWR4git4LG09hAxGzLI= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-6572] Extend nops num in "maybe_gen_insn" for RISC-V Vector intrinsics X-Act-Checkin: gcc X-Git-Author: Ju-Zhe Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: ab7bb445ee586258a6210462e92ed196d61beb9e X-Git-Newrev: a803c268c5529624bdb7d02131d4862516a63c22 Message-Id: <20230310082623.495EF3858002@sourceware.org> Date: Fri, 10 Mar 2023 08:26:23 +0000 (GMT) List-Id: https://gcc.gnu.org/g:a803c268c5529624bdb7d02131d4862516a63c22 commit r13-6572-ga803c268c5529624bdb7d02131d4862516a63c22 Author: Ju-Zhe Zhong Date: Wed Mar 8 15:42:13 2023 +0800 Extend nops num in "maybe_gen_insn" for RISC-V Vector intrinsics Hi, current maybe_gen_insn can only expand 9 nops. For RVV intrinsics, I need to extend it as 10, otherwise I should use GEN_FCN. This patch is quite obvious change, Ok for trunk ? Thanks. gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (function_expander::use_ternop_insn): Use maybe_gen_insn instead. (function_expander::use_widen_ternop_insn): Ditto. * optabs.cc (maybe_gen_insn): Extend nops handling. Diff: --- gcc/config/riscv/riscv-vector-builtins.cc | 24 ++---------------------- gcc/optabs.cc | 5 +++++ 2 files changed, 7 insertions(+), 22 deletions(-) diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc index 2d57086262b..680c165cc2b 100644 --- a/gcc/config/riscv/riscv-vector-builtins.cc +++ b/gcc/config/riscv/riscv-vector-builtins.cc @@ -3100,17 +3100,7 @@ function_expander::use_ternop_insn (bool vd_accum_p, insn_code icode) add_input_operand (Pmode, get_tail_policy_for_pred (pred)); add_input_operand (Pmode, get_mask_policy_for_pred (pred)); add_input_operand (Pmode, get_avl_type_rtx (avl_type::NONVLMAX)); - - /* See optabs.cc, the maximum nops is 9 for using 'maybe_gen_insn'. - We temporarily use GCN directly. We will change it back it we - can support nops >= 10. */ - gcc_assert (maybe_legitimize_operands (icode, 0, opno, m_ops)); - rtx_insn *pat = GEN_FCN ( - icode) (m_ops[0].value, m_ops[1].value, m_ops[2].value, m_ops[3].value, - m_ops[4].value, m_ops[5].value, m_ops[6].value, m_ops[7].value, - m_ops[8].value, m_ops[9].value); - emit_insn (pat); - return m_ops[0].value; + return generate_insn (icode); } /* Implement the call using instruction ICODE, with a 1:1 mapping between @@ -3142,17 +3132,7 @@ function_expander::use_widen_ternop_insn (insn_code icode) add_input_operand (Pmode, get_tail_policy_for_pred (pred)); add_input_operand (Pmode, get_mask_policy_for_pred (pred)); add_input_operand (Pmode, get_avl_type_rtx (avl_type::NONVLMAX)); - - /* See optabs.cc, the maximum nops is 9 for using 'maybe_gen_insn'. - We temporarily use GCN directly. We will change it back it we - can support nops >= 10. */ - gcc_assert (maybe_legitimize_operands (icode, 0, opno, m_ops)); - rtx_insn *pat = GEN_FCN ( - icode) (m_ops[0].value, m_ops[1].value, m_ops[2].value, m_ops[3].value, - m_ops[4].value, m_ops[5].value, m_ops[6].value, m_ops[7].value, - m_ops[8].value, m_ops[9].value); - emit_insn (pat); - return m_ops[0].value; + return generate_insn (icode); } /* Implement the call using instruction ICODE, with a 1:1 mapping between diff --git a/gcc/optabs.cc b/gcc/optabs.cc index cf22bfec3f5..4c641cab192 100644 --- a/gcc/optabs.cc +++ b/gcc/optabs.cc @@ -8091,6 +8091,11 @@ maybe_gen_insn (enum insn_code icode, unsigned int nops, return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value, ops[3].value, ops[4].value, ops[5].value, ops[6].value, ops[7].value, ops[8].value); + case 10: + return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value, + ops[3].value, ops[4].value, ops[5].value, + ops[6].value, ops[7].value, ops[8].value, + ops[9].value); } gcc_unreachable (); }