[gcc(refs/vendors/ARM/heads/arm-12-m-pacbti)] [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti

[gcc(refs/vendors/ARM/heads/arm-12-m-pacbti)] [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti

[Andrea Corallo]

https://gcc.gnu.org/g:8c86f2c21b453e85ec4dec1ed64612a8ff834216

commit 8c86f2c21b453e85ec4dec1ed64612a8ff834216
Author: Andrea Corallo <andrea.corallo@arm.com>
Date:   Mon Dec 6 11:38:32 2021 +0100

    [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti
    
    This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
    This feature enables pointer signing and authentication instructions
    on M-class architectures.
    
    Pre-approved here
    <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>.
    
    gcc/Changelog:
    
            * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
            * config/arm/arm-cpus.in (pacbti): New feature.
            * doc/invoke.texi (Arm Options): Document it.
    
    Co-Authored-By: Tejas Belagod  <tbelagod@arm.com>

Diff:
---
 gcc/config/arm/arm-cpus.in | 5 +++++
 gcc/config/arm/arm.h       | 6 ++++++
 gcc/doc/invoke.texi        | 3 +++
 3 files changed, 14 insertions(+)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 0d3082b569f..9502a34fa97 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -229,6 +229,10 @@ define feature cdecp5
 define feature cdecp6
 define feature cdecp7
 
+# M-profile control flow integrity extensions (PAC/AUT/BTI).
+# Optional from Armv8.1-M Mainline.
+define feature pacbti
+
 # Feature groups.  Conventionally all (or mostly) upper case.
 # ALL_FPU lists all the feature bits associated with the floating-point
 # unit; these will all be removed if the floating-point unit is disabled
@@ -743,6 +747,7 @@ begin arch armv8.1-m.main
  isa ARMv8_1m_main
 # fp => FPv5-sp-d16; fp.dp => FPv5-d16
  option dsp add armv7em
+ option pacbti add pacbti
  option fp add FPv5 fp16
  option fp.dp add FPv5 FP_DBL fp16
  option nofp remove ALL_FP
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index e15722b0be3..3d718f947bb 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -331,6 +331,12 @@ emission of floating point pcs attributes.  */
 						isa_bit_mve_float) \
 			       && !TARGET_GENERAL_REGS_ONLY)
 
+/* Non-zero if this target supports Armv8.1-M Mainline pointer-signing
+   extension.  */
+#define TARGET_HAVE_PACBTI (arm_arch8_1m_main \
+			    && bitmap_bit_p (arm_active_target.isa, \
+					     isa_bit_pacbti))
+
 /* MVE have few common instructions as VFP, like VLDM alias VPOP, VLDR, VSTM
    alia VPUSH, VSTR and VMOV, VMSR and VMRS.  In the same manner it updates few
    registers such as FPCAR, FPCCR, FPDSCR, FPSCR, MVFR0, MVFR1 and MVFR2.  All
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index eb7e46c8668..3f2e9781d05 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21011,6 +21011,9 @@ Disable the floating-point extension.
 @item +cdecp0, +cdecp1, ... , +cdecp7
 Enable the Custom Datapath Extension (CDE) on selected coprocessors according
 to the numbers given in the options in the range 0 to 7.
+
+@item +pacbti
+Enable the Pointer Authentication and Branch Target Identification Extension.
 @end table
 
 @item  armv8-m.main

[gcc(refs/vendors/ARM/heads/arm-12-m-pacbti)] [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti

[Andrea Corallo]

https://gcc.gnu.org/g:6f8a4d5021f5c79e030e9d6da96eb15b3b5545b0

commit 6f8a4d5021f5c79e030e9d6da96eb15b3b5545b0
Author: Andrea Corallo <andrea.corallo@arm.com>
Date:   Mon Dec 6 11:38:32 2021 +0100

    [PATCH 2/15] arm: Add Armv8.1-M Mainline target feature +pacbti
    
    This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
    This feature enables pointer signing and authentication instructions
    on M-class architectures.
    
    Pre-approved here
    <https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>.
    
    gcc/Changelog:
    
            * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
            * config/arm/arm-cpus.in (pacbti): New feature.
            * doc/invoke.texi (Arm Options): Document it.
    
    Co-Authored-By: Tejas Belagod  <tbelagod@arm.com>

Diff:
---
 gcc/config/arm/arm-cpus.in | 5 +++++
 gcc/config/arm/arm.h       | 6 ++++++
 gcc/doc/invoke.texi        | 3 +++
 3 files changed, 14 insertions(+)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 0d3082b569f..9502a34fa97 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -229,6 +229,10 @@ define feature cdecp5
 define feature cdecp6
 define feature cdecp7
 
+# M-profile control flow integrity extensions (PAC/AUT/BTI).
+# Optional from Armv8.1-M Mainline.
+define feature pacbti
+
 # Feature groups.  Conventionally all (or mostly) upper case.
 # ALL_FPU lists all the feature bits associated with the floating-point
 # unit; these will all be removed if the floating-point unit is disabled
@@ -743,6 +747,7 @@ begin arch armv8.1-m.main
  isa ARMv8_1m_main
 # fp => FPv5-sp-d16; fp.dp => FPv5-d16
  option dsp add armv7em
+ option pacbti add pacbti
  option fp add FPv5 fp16
  option fp.dp add FPv5 FP_DBL fp16
  option nofp remove ALL_FP
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index f479540812a..3495ab857ea 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -335,6 +335,12 @@ emission of floating point pcs attributes.  */
 						isa_bit_mve_float) \
 			       && !TARGET_GENERAL_REGS_ONLY)
 
+/* Non-zero if this target supports Armv8.1-M Mainline pointer-signing
+   extension.  */
+#define TARGET_HAVE_PACBTI (arm_arch8_1m_main \
+			    && bitmap_bit_p (arm_active_target.isa, \
+					     isa_bit_pacbti))
+
 /* MVE have few common instructions as VFP, like VLDM alias VPOP, VLDR, VSTM
    alia VPUSH, VSTR and VMOV, VMSR and VMRS.  In the same manner it updates few
    registers such as FPCAR, FPCCR, FPDSCR, FPSCR, MVFR0, MVFR1 and MVFR2.  All
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ff6c338bedb..2b2bd69c9a0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21010,6 +21010,9 @@ Disable the floating-point extension.
 @item +cdecp0, +cdecp1, ... , +cdecp7
 Enable the Custom Datapath Extension (CDE) on selected coprocessors according
 to the numbers given in the options in the range 0 to 7.
+
+@item +pacbti
+Enable the Pointer Authentication and Branch Target Identification Extension.
 @end table
 
 @item  armv8-m.main