From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id E1DBE3858D38; Thu, 16 Mar 2023 02:54:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org E1DBE3858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1678935263; bh=lyJRs6sRK+Ug3xaa8qh+YAvuvuGnX3Hj3SOdD7xBc2A=; h=From:To:Subject:Date:From; b=oi22VnTBy8uSc7ffEapWNQOxoUBI4Gb2BWylCNmnEiOdIG7LVFvIPD8mtPMtNUUj+ /TbdtoSVqGAnP/3rxBosAgHVVzlo+66XUwggriU4NpZv8WU35WPI8E+qGqga1SNFDC 0nU7GyGxb35fpjd0jnwLRYoP3IDyNJ1o1AVBHJhs= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work111)] Make load/cmp fusion know about prefixed loads. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work111 X-Git-Oldrev: da49950d6a2f9977c0f0a08245d7340510a96a73 X-Git-Newrev: 4e87e200f310b68bea6bf69c89782c2b8fe5d2a8 Message-Id: <20230316025423.E1DBE3858D38@sourceware.org> Date: Thu, 16 Mar 2023 02:54:23 +0000 (GMT) List-Id: https://gcc.gnu.org/g:4e87e200f310b68bea6bf69c89782c2b8fe5d2a8 commit 4e87e200f310b68bea6bf69c89782c2b8fe5d2a8 Author: Michael Meissner Date: Wed Mar 15 22:53:53 2023 -0400 Make load/cmp fusion know about prefixed loads. 2023-03-15 Michael Meissner Aaron Sawdey gcc/ PR target/105325 * gcc/config/rs6000/genfusion.pl (gen_ld_cmpi_p10): The ld and lwa instructions use the DS encoding instead of D. Set the sign_extend attribute as appropriate. * gcc/config/rs6000/fusion.md: Regenerate. * gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi instructions to the list of instructions that might have a prefixed load instruction. gcc/testsuite/ PR target/105325 * g++.target/powerpc/pr105325.C: New test. Diff: --- gcc/config/rs6000/fusion.md | 9 ++++-- gcc/config/rs6000/genfusion.pl | 18 ++++++++++-- gcc/config/rs6000/rs6000.md | 2 +- gcc/testsuite/g++.target/powerpc/altivec-types-3.C | 34 +++++++++++++++------- gcc/testsuite/g++.target/powerpc/pr105325.C | 0 5 files changed, 46 insertions(+), 17 deletions(-) diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md index d45fb138a70..8103c13ecef 100644 --- a/gcc/config/rs6000/fusion.md +++ b/gcc/config/rs6000/fusion.md @@ -106,7 +106,7 @@ ;; load mode is SI result mode is clobber compare mode is CC extend is none (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:SI 1 "lwa_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:SI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -148,7 +148,7 @@ ;; load mode is SI result mode is SI compare mode is CC extend is none (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:SI 1 "lwa_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -190,7 +190,7 @@ ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") + (compare:CC (match_operand:SI 1 "lwa_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))] "(TARGET_P10_FUSION)" @@ -205,6 +205,7 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") + (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -247,6 +248,7 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") + (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -289,6 +291,7 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") + (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl index e4db352e0ce..d2d5a66a992 100755 --- a/gcc/config/rs6000/genfusion.pl +++ b/gcc/config/rs6000/genfusion.pl @@ -73,13 +73,22 @@ sub gen_ld_cmpi_p10 $mempred = "non_update_memory_operand"; if ( $ccmode eq 'CC' ) { next CCMODE if $lmode eq 'QI'; - if ( $lmode eq 'DI' || $lmode eq 'SI' ) { + if ( $lmode eq 'HI' ) { + $np = "NON_PREFIXED_D"; + $mempred = "non_update_memory_operand"; + $echr = "a"; + } elsif ( $lmode eq 'SI' ) { + # ld and lwa are both DS-FORM. + $np = "NON_PREFIXED_DS"; + $mempred = "lwa_operand"; + $echr = "a"; + } elsif ( $lmode eq 'DI' ) { # ld and lwa are both DS-FORM. $np = "NON_PREFIXED_DS"; $mempred = "ds_form_mem_operand"; + $echr = ""; } $cmpl = ""; - $echr = "a"; $constpred = "const_m1_to_1_operand"; } else { if ( $lmode eq 'DI' ) { @@ -137,6 +146,11 @@ sub gen_ld_cmpi_p10 print " \"\"\n"; print " [(set_attr \"type\" \"fused_load_cmpi\")\n"; print " (set_attr \"cost\" \"8\")\n"; + + if ($extend eq "sign") { + print " (set_attr \"sign_extend\" \"yes\")\n"; + } + print " (set_attr \"length\" \"8\")])\n"; print "\n"; } diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4bc0b957ac1..be68bcf278a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -302,7 +302,7 @@ (eq_attr "maybe_prefixed" "no")) (const_string "no") - (eq_attr "type" "load,fpload,vecload") + (eq_attr "type" "load,fpload,vecload,fused_load_cmpi") (if_then_else (match_test "prefixed_load_p (insn)") (const_string "yes") (const_string "no")) diff --git a/gcc/testsuite/g++.target/powerpc/altivec-types-3.C b/gcc/testsuite/g++.target/powerpc/altivec-types-3.C index 8cb41394e2d..fcf5fdadbd9 100644 --- a/gcc/testsuite/g++.target/powerpc/altivec-types-3.C +++ b/gcc/testsuite/g++.target/powerpc/altivec-types-3.C @@ -1,14 +1,26 @@ -/* { dg-do compile } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-do assemble } */ /* { dg-require-effective-target lp64 } */ -/* { dg-options "-maltivec -mno-vsx" } */ +/* { dg-options "-O -fstack-protector-all" } */ +/* { dg-require-effective-target powerpc_prefixed_addr -mdejagnu-cpu=power10 } */ -/* These should be rejected for 64-bit code. */ +// If -fstack-protector-all is on, the load fusion code would generate a 'lwa' +// instead of a 'plwz' instruction with a large offset. -__vector long vl; /* { dg-error "invalid for 64" } */ -__vector unsigned long vul; /* { dg-error "invalid for 64" } */ -__vector signed long vsl; /* { dg-error "invalid for 64" } */ -__vector __bool long int vbli; /* { dg-error "invalid for 64" } */ -__vector long int vli; /* { dg-error "invalid for 64" } */ -__vector unsigned long int vuli; /* { dg-error "invalid for 64" } */ -__vector signed long int vsli; /* { dg-error "invalid for 64" } */ +#ifndef NUM +#define NUM 10000 +#endif + +struct Ath__array1D { + int _current; + int getCnt() { return _current; } +}; +struct extMeasure { + int _mapTable[NUM]; + Ath__array1D _metRCTable; +}; +void measureRC() { + extMeasure m; + for (; m._metRCTable.getCnt();) + for (;;) + ; +} diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C new file mode 100644 index 00000000000..e69de29bb2d