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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work111)] Revert patches
Date: Thu, 16 Mar 2023 03:12:49 +0000 (GMT) [thread overview]
Message-ID: <20230316031249.B831C3858D38@sourceware.org> (raw)
https://gcc.gnu.org/g:6a8d9654450bdca6115636bfc0bbddd5d54110c0
commit 6a8d9654450bdca6115636bfc0bbddd5d54110c0
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Wed Mar 15 23:12:44 2023 -0400
Revert patches
Diff:
---
gcc/config/rs6000/fusion.md | 9 ++----
gcc/config/rs6000/genfusion.pl | 18 ++----------
gcc/config/rs6000/rs6000.md | 2 +-
gcc/testsuite/g++.target/powerpc/altivec-types-3.C | 34 +++++++---------------
gcc/testsuite/g++.target/powerpc/pr105325.C | 0
5 files changed, 17 insertions(+), 46 deletions(-)
diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index 8103c13ecef..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -106,7 +106,7 @@
;; load mode is SI result mode is clobber compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(clobber (match_scratch:SI 0 "=r"))]
"(TARGET_P10_FUSION)"
@@ -148,7 +148,7 @@
;; load mode is SI result mode is SI compare mode is CC extend is none
(define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
"(TARGET_P10_FUSION)"
@@ -190,7 +190,7 @@
;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
(define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
[(set (match_operand:CC 2 "cc_reg_operand" "=x")
- (compare:CC (match_operand:SI 1 "lwa_operand" "m")
+ (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
(match_operand:SI 3 "const_m1_to_1_operand" "n")))
(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
"(TARGET_P10_FUSION)"
@@ -205,7 +205,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -248,7 +247,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -291,7 +289,6 @@
""
[(set_attr "type" "fused_load_cmpi")
(set_attr "cost" "8")
- (set_attr "sign_extend" "yes")
(set_attr "length" "8")])
;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index d2d5a66a992..e4db352e0ce 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -73,22 +73,13 @@ sub gen_ld_cmpi_p10
$mempred = "non_update_memory_operand";
if ( $ccmode eq 'CC' ) {
next CCMODE if $lmode eq 'QI';
- if ( $lmode eq 'HI' ) {
- $np = "NON_PREFIXED_D";
- $mempred = "non_update_memory_operand";
- $echr = "a";
- } elsif ( $lmode eq 'SI' ) {
- # ld and lwa are both DS-FORM.
- $np = "NON_PREFIXED_DS";
- $mempred = "lwa_operand";
- $echr = "a";
- } elsif ( $lmode eq 'DI' ) {
+ if ( $lmode eq 'DI' || $lmode eq 'SI' ) {
# ld and lwa are both DS-FORM.
$np = "NON_PREFIXED_DS";
$mempred = "ds_form_mem_operand";
- $echr = "";
}
$cmpl = "";
+ $echr = "a";
$constpred = "const_m1_to_1_operand";
} else {
if ( $lmode eq 'DI' ) {
@@ -146,11 +137,6 @@ sub gen_ld_cmpi_p10
print " \"\"\n";
print " [(set_attr \"type\" \"fused_load_cmpi\")\n";
print " (set_attr \"cost\" \"8\")\n";
-
- if ($extend eq "sign") {
- print " (set_attr \"sign_extend\" \"yes\")\n";
- }
-
print " (set_attr \"length\" \"8\")])\n";
print "\n";
}
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index be68bcf278a..4bc0b957ac1 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
(eq_attr "maybe_prefixed" "no"))
(const_string "no")
- (eq_attr "type" "load,fpload,vecload,fused_load_cmpi")
+ (eq_attr "type" "load,fpload,vecload")
(if_then_else (match_test "prefixed_load_p (insn)")
(const_string "yes")
(const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/altivec-types-3.C b/gcc/testsuite/g++.target/powerpc/altivec-types-3.C
index fcf5fdadbd9..8cb41394e2d 100644
--- a/gcc/testsuite/g++.target/powerpc/altivec-types-3.C
+++ b/gcc/testsuite/g++.target/powerpc/altivec-types-3.C
@@ -1,26 +1,14 @@
-/* { dg-do assemble } */
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-require-effective-target lp64 } */
-/* { dg-options "-O -fstack-protector-all" } */
-/* { dg-require-effective-target powerpc_prefixed_addr -mdejagnu-cpu=power10 } */
+/* { dg-options "-maltivec -mno-vsx" } */
-// If -fstack-protector-all is on, the load fusion code would generate a 'lwa'
-// instead of a 'plwz' instruction with a large offset.
+/* These should be rejected for 64-bit code. */
-#ifndef NUM
-#define NUM 10000
-#endif
-
-struct Ath__array1D {
- int _current;
- int getCnt() { return _current; }
-};
-struct extMeasure {
- int _mapTable[NUM];
- Ath__array1D _metRCTable;
-};
-void measureRC() {
- extMeasure m;
- for (; m._metRCTable.getCnt();)
- for (;;)
- ;
-}
+__vector long vl; /* { dg-error "invalid for 64" } */
+__vector unsigned long vul; /* { dg-error "invalid for 64" } */
+__vector signed long vsl; /* { dg-error "invalid for 64" } */
+__vector __bool long int vbli; /* { dg-error "invalid for 64" } */
+__vector long int vli; /* { dg-error "invalid for 64" } */
+__vector unsigned long int vuli; /* { dg-error "invalid for 64" } */
+__vector signed long int vsli; /* { dg-error "invalid for 64" } */
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index e69de29bb2d..00000000000
next reply other threads:[~2023-03-16 3:12 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-16 3:12 Michael Meissner [this message]
2023-03-16 19:30 Michael Meissner
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