From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 20AC73858D28; Mon, 17 Apr 2023 21:25:08 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 20AC73858D28 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1681766708; bh=Anq+E/YUAhN5NpWIBqNlC019BMo1l1VjSgDFgPCfo1k=; h=From:To:Subject:Date:From; b=DKUO9KHjwVNvwp8cY30ZSq9/Ip/lt86kPQPuO6MTW43U8VDLJukJK2s+Lt7xkwFHU nLU/45FeFNHQbINWQEZiY/SzCRYSX75Suhe+VX2+Zh54TusPUWQRKDAep+K1RiZHxc WT4NWOkF8ojY6OFTsJum3/KWqKll0irFfHmHiaaM= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119-dmf)] Fix typo in insn name. X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119-dmf X-Git-Oldrev: e012fcf16ba1d3b3865b8c46a2b9942d6976065c X-Git-Newrev: 287fbeca80a652d4420cbb66a9bda399413798ee Message-Id: <20230417212508.20AC73858D28@sourceware.org> Date: Mon, 17 Apr 2023 21:25:08 +0000 (GMT) List-Id: https://gcc.gnu.org/g:287fbeca80a652d4420cbb66a9bda399413798ee commit 287fbeca80a652d4420cbb66a9bda399413798ee Author: Michael Meissner Date: Mon Apr 17 17:24:50 2023 -0400 Fix typo in insn name. In doing other work, I noticed that there was an insn: vsx_extract_v4sf__load Which did not have an iterator. I removed the useless . 2023-04-17 Michael Meissner gcc/ * config/rs6000/vsx.md (vsx_extract_v4sf_load): Rename from vsx_extract_v4sf__load. Diff: --- gcc/config/rs6000/vsx.md | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 856d16956e0..950ecb1a1a7 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3549,7 +3549,7 @@ [(set_attr "length" "8") (set_attr "type" "fp")]) -(define_insn_and_split "*vsx_extract_v4sf__load" +(define_insn_and_split "*vsx_extract_v4sf_load" [(set (match_operand:SF 0 "register_operand" "=f,v,v,?r") (vec_select:SF (match_operand:V4SF 1 "memory_operand" "m,Z,m,m") @@ -3567,6 +3567,27 @@ (set_attr "length" "8") (set_attr "isa" "*,p7v,p9v,*")]) +;; V4SF extract from memory and convert to DFmode with constant element number +(define_insn_and_split "*vsx_extract_v4sf_to_df_load" + [(set (match_operand:DF 0 "register_operand" "=f,v") + (float_extend:DF + (vec_select:SF + (match_operand:V4SF 1 "memory_operand" "m,m") + (parallel [(match_operand:QI 2 "const_0_to_3_operand" "n,n")])))) + (clobber (match_scratch:P 3 "=&b,&b"))] + "VECTOR_MEM_VSX_P (V4SFmode)" + "#" + "&& reload_completed" + [(set (match_dup 0) + (float_extend:DF (match_dup 4)))] +{ + operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2], + operands[3], SFmode); +} + [(set_attr "type" "fpload") + (set_attr "length" "8") + (set_attr "isa" "*,p8v")]) + ;; Variable V4SF extract from a register (define_insn_and_split "vsx_extract_v4sf_var" [(set (match_operand:SF 0 "gpc_reg_operand" "=wa")