From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <meissner@sourceware.org>
Received: by sourceware.org (Postfix, from userid 1005)
	id C03603858D37; Fri, 21 Apr 2023 03:09:18 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C03603858D37
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1682046558;
	bh=HauuhFjEXVQXkoHly7rIAbjVqowkUXSMZRnJjscFfQY=;
	h=From:To:Subject:Date:From;
	b=gj62ii3UFF4moO7vVsNOshlIpp2lcSip3qToNsm3/EadUNmRCsIdVR2G+fjWa+wKm
	 zG7oN2wvuWrtY+mvqhB6KnoBt8J94wQmO61qxbcLIoVMxdyZOi9Ydjxwf8BKo86k7Z
	 ef7TcXOb44EyXaK4DrM+3GbXYJu8rqYiIKWhbkTY=
Content-Type: text/plain; charset="us-ascii"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work119)] Revert patches
X-Act-Checkin: gcc
X-Git-Author: Michael Meissner <meissner@linux.ibm.com>
X-Git-Refname: refs/users/meissner/heads/work119
X-Git-Oldrev: 29b454a5acd53d82628cbcc42dd5fba0b2c22cf6
X-Git-Newrev: ce7a90c0c0b37c320993c5ccab8f6de271a9be09
Message-Id: <20230421030918.C03603858D37@sourceware.org>
Date: Fri, 21 Apr 2023 03:09:18 +0000 (GMT)
List-Id: <gcc-cvs.sourceware.org>

https://gcc.gnu.org/g:ce7a90c0c0b37c320993c5ccab8f6de271a9be09

commit ce7a90c0c0b37c320993c5ccab8f6de271a9be09
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Apr 20 23:09:14 2023 -0400

    Revert patches

Diff:
---
 gcc/config/rs6000/vsx.md | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index d4d00a3d637..c5c2920fcd1 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4124,23 +4124,21 @@
 
 ;; Variable V16QI/V8HI/V4SI extract from memory
 (define_insn_and_split "*vsx_extract_<mode>_var_load"
-  [(set (match_operand:<VEC_base> 0 "gpc_reg_operand" "=r,<VSX_EX>")
+  [(set (match_operand:<VEC_base> 0 "gpc_reg_operand" "=r")
 	(unspec:<VEC_base>
-	 [(match_operand:VSX_EXTRACT_I 1 "memory_operand" "Q,Q")
-	  (match_operand:DI 2 "gpc_reg_operand" "r,r")]
+	 [(match_operand:VSX_EXTRACT_I 1 "memory_operand" "Q")
+	  (match_operand:DI 2 "gpc_reg_operand" "r")]
 	 UNSPEC_VSX_EXTRACT))
-   (clobber (match_scratch:DI 3 "=&b,&b"))]
+   (clobber (match_scratch:DI 3 "=&b"))]
   "VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_DIRECT_MOVE_64BIT"
   "#"
-  "&& 1"
+  "&& reload_completed"
   [(set (match_dup 0) (match_dup 4))]
 {
   operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2],
 					   operands[3], <VEC_base>mode);
 }
-  [(set_attr "type" "load,fpload")
-   (set_attr "length" "8")
-   (set_attr "isa" "*,<VSX_EX_ISA>")])
+  [(set_attr "type" "load")])
 
 ;; ISA 3.1 extract
 (define_expand "vextractl<mode>"