From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 913AA3858D20; Fri, 21 Apr 2023 04:23:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 913AA3858D20 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682051036; bh=3mHRs1i5V0d3+pqwIoS6zER2ghfE4rG/TeyUdExV4fg=; h=From:To:Subject:Date:From; b=XjQnoPWuIBoL4qgUc+IgjZESaT+pq3dU095ekFbthiZgrYCQaVDGImhHPzJPsrmzT Fb/N+3cUaMiq/fJBHc6k++m0loKcXdLjVZipjhPHxJ4H6caB4XOZOHLnVly02VqJ4B OzZBRUnilnT0eKslH6JCnBzaSH9lIOJGLknpL20w= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Update ChangeLog.* X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119 X-Git-Oldrev: 74f840c6ceef5e2c92f31dfde9b23e41e9007be4 X-Git-Newrev: 4481e35da13348a1acf4d17c2a2f0c018c95cf41 Message-Id: <20230421042356.913AA3858D20@sourceware.org> Date: Fri, 21 Apr 2023 04:23:56 +0000 (GMT) List-Id: https://gcc.gnu.org/g:4481e35da13348a1acf4d17c2a2f0c018c95cf41 commit 4481e35da13348a1acf4d17c2a2f0c018c95cf41 Author: Michael Meissner Date: Fri Apr 21 00:23:53 2023 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 47 ++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 29c73d701dd..156db43a1c1 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,8 +1,49 @@ +==================== Branch work119, patch #49 ==================== + +Fold sign or zero extension into vsx_extract from memory with variable element. + +This patch folds conversion to floating point of vsx_extract from memory of V4SI +elements where the element number is constant. This code optimizes things so it +will load the integer with LFIWAX or LFIWZX directly into a vector register +rather than loading it into a GPR and doing a direct move operation. + +2023-04-21 Michael Meissner + +gcc/ + + * config/rs6000/vsx.md (vsx_extract_v4si_var_load_to_): New + insn. + +gcc/testsuite/ + + * gcc.target/powerpc/vec-extract-mem-int-4.c: New file. + +==================== Branch work119, patch #48 ==================== + +Fold sign or zero convert into variable vsx_extract from memory. + +This patch folds sign or zero convert operations into vsx_extract from memory +where the element number is constant. + +2023-04-21 Michael Meissner + +gcc/ + + * config/rs6000/vsx.md (vsx_extract__var_load_to_udi): New insn. + (vsx_extract__var_load_to_sdi): New insn. + (vsx_extract_v8hi_var_load_to_si): New insn. + +gcc/testsuite/ + + * gcc.target/powerpc/vec-extract-mem-char-2.c: New file. + * gcc.target/powerpc/vec-extract-mem-int-3.c: New file. + * gcc.target/powerpc/vec-extract-mem-short-2.c: New file. + ==================== Branch work119, patch #47 ==================== Allow vec_extract with variable element number to load vector registers. -2023-04-20 Michael Meissner +2023-04-21 Michael Meissner gcc/ @@ -17,7 +58,7 @@ Combine variable element vec_extract of V4SF with DF convert. This patch adds a combine insn that merges loading up a vec_extract of V4SFmode where the element number is variable combined with a conversion to DFmode. -2023-04-20 Michael Meissner +2023-04-21 Michael Meissner gcc/ @@ -52,7 +93,7 @@ Fold sign or zero convert into vsx_extract from memory. This patch folds sign or zero convert operations into vsx_extract from memory where the element number is constant. -2023-04-18 Michael Meissner +2023-04-21 Michael Meissner gcc/