From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1461) id F2D043857739; Fri, 21 Apr 2023 11:23:09 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org F2D043857739 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682076189; bh=A2BHIwoe1VVVsLa1XAMBwBsQD63rLZW18FVUi1pO2g0=; h=From:To:Subject:Date:From; b=Yej2gacslsouIbxbsGVlQBBRCBoXuixGcsUjDKMpAzcpLxTc6Hq3JQzYxGg6p48iZ ii5OcaWSh3rXg7ifiNEjo8qHBo2lsW/p6pZh4PStHcVLfunjqr4+/TkIzYX+hkY5ho 5HundWxbDxFjhWfK0uMg15LZO3ZSCYbOBT49plbE= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Andrew Stubbs To: gcc-cvs@gcc.gnu.org Subject: [gcc/devel/omp/gcc-12] amdgcn: update target-supports.exp X-Act-Checkin: gcc X-Git-Author: Andrew Stubbs X-Git-Refname: refs/heads/devel/omp/gcc-12 X-Git-Oldrev: c4116975a5d396f3503b86c0c8cbfe6fffcb146b X-Git-Newrev: 7deab8f87364ac981b2ee58108db7df48de185cc Message-Id: <20230421112309.F2D043857739@sourceware.org> Date: Fri, 21 Apr 2023 11:23:09 +0000 (GMT) List-Id: https://gcc.gnu.org/g:7deab8f87364ac981b2ee58108db7df48de185cc commit 7deab8f87364ac981b2ee58108db7df48de185cc Author: Andrew Stubbs Date: Tue Apr 18 12:03:43 2023 +0100 amdgcn: update target-supports.exp The backend can now vectorize more things. gcc/testsuite/ChangeLog: * lib/target-supports.exp (check_effective_target_vect_call_copysignf): Add amdgcn. (check_effective_target_vect_call_sqrtf): Add amdgcn. (check_effective_target_vect_call_ceilf): Add amdgcn. (check_effective_target_vect_call_floor): Add amdgcn. (check_effective_target_vect_logical_reduc): Add amdgcn. Diff: --- gcc/testsuite/ChangeLog.omp | 12 ++++++++++++ gcc/testsuite/lib/target-supports.exp | 15 ++++++++++----- 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/gcc/testsuite/ChangeLog.omp b/gcc/testsuite/ChangeLog.omp index 16fe6f47379..1a1bd6aaccb 100644 --- a/gcc/testsuite/ChangeLog.omp +++ b/gcc/testsuite/ChangeLog.omp @@ -1,3 +1,15 @@ +2023-04-21 Andrew Stubbs + + Backport from mainline: + Andrew Stubbs + + * lib/target-supports.exp + (check_effective_target_vect_call_copysignf): Add amdgcn. + (check_effective_target_vect_call_sqrtf): Add amdgcn. + (check_effective_target_vect_call_ceilf): Add amdgcn. + (check_effective_target_vect_call_floor): Add amdgcn. + (check_effective_target_vect_logical_reduc): Add amdgcn. + 2023-04-20 Andrew Stubbs Backport from mainline: diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index d64818a018d..d262f58cb44 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8370,7 +8370,8 @@ proc check_effective_target_vect_call_copysignf { } { return [check_cached_effective_target_indexed vect_call_copysignf { expr { [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget powerpc*-*-*] - || [istarget aarch64*-*-*] }}] + || [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports hardware square root instructions. @@ -8406,7 +8407,8 @@ proc check_effective_target_vect_call_sqrtf { } { || [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) || ([istarget s390*-*-*] - && [check_effective_target_s390_vx]) }}] + && [check_effective_target_s390_vx]) + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector lrint calls. @@ -8451,14 +8453,16 @@ proc check_effective_target_vect_call_ceil { } { proc check_effective_target_vect_call_ceilf { } { return [check_cached_effective_target_indexed vect_call_ceilf { - expr { [istarget aarch64*-*-*] }}] + expr { [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector floor calls. proc check_effective_target_vect_call_floor { } { return [check_cached_effective_target_indexed vect_call_floor { - expr { [istarget aarch64*-*-*] }}] + expr { [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector floorf calls. @@ -8514,7 +8518,8 @@ proc check_effective_target_vect_call_roundf { } { # Return 1 if the target supports AND, OR and XOR reduction. proc check_effective_target_vect_logical_reduc { } { - return [check_effective_target_aarch64_sve] + return [expr { [check_effective_target_aarch64_sve] + || [istarget amdgcn-*-*] }] } # Return 1 if the target supports the fold_extract_last optab.