From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 84F823858C83; Fri, 21 Apr 2023 15:09:29 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 84F823858C83 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682089769; bh=hb31og+gmIUbVjIloP1RiidNCSL6GMOT6qT2CVVFezc=; h=From:To:Subject:Date:From; b=w3ru3+sQ5aTB8Ui2SahFS38nD0VMq2LYfjBq+NjYLAM0ULPssWyjnUHKT/ua7i6eu S7Y2zHn2DFrR5O+leLR7BTyQLRcsFjCxLBrLDYej08+adI28d2OhDomwzfi7RpErbl oM9f6zu4KhJ54mQmjIiTJcqf+b+jQA1gTMjwLMWg= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Revert patches X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119 X-Git-Oldrev: 4481e35da13348a1acf4d17c2a2f0c018c95cf41 X-Git-Newrev: 08586c25674ae828f8132efb6a5e7ebb085dc9e9 Message-Id: <20230421150929.84F823858C83@sourceware.org> Date: Fri, 21 Apr 2023 15:09:29 +0000 (GMT) List-Id: https://gcc.gnu.org/g:08586c25674ae828f8132efb6a5e7ebb085dc9e9 commit 08586c25674ae828f8132efb6a5e7ebb085dc9e9 Author: Michael Meissner Date: Fri Apr 21 11:09:25 2023 -0400 Revert patches Diff: --- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c | 2 +- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c | 3 ++- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c | 3 ++- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c | 2 +- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c | 3 ++- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c | 2 +- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c | 3 ++- gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c | 2 +- 8 files changed, 12 insertions(+), 8 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c index 42599c214e4..29a8aa84db2 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p7.c @@ -11,7 +11,7 @@ /* one extsb (extend sign-bit) instruction generated for each test against unsigned types */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 9 } } */ /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* -m32 target uses rlwinm in place of rldicl. */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c index cbf6cffbeba..3cae644b90b 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c @@ -13,7 +13,8 @@ /* { dg-final { scan-assembler-times {\mxxpermdi\M} 1 } } */ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 target has an 'add' in place of one of the 'addi'. */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ /* -m32 target has a rlwinm in place of a rldic . */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c index c9abb6c1f35..59a4979457d 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c @@ -12,7 +12,8 @@ /* { dg-final { scan-assembler-times {\mxscvspdp\M} 1 } } */ /* { dg-final { scan-assembler-times {\mli\M} 1 } } */ /* -m32 as an add in place of an addi. */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 2 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 1 } } */ /* -m32 uses rlwinm in place of rldic */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c index 68eeeede4b3..4b1d75ee26d 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c @@ -26,7 +26,7 @@ /* { dg-final { scan-assembler-times {\mstxvd2x\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 1 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlfs\M} 1 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 1 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 2 { target ilp32 } } } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c index 418762e3948..3729a1646e9 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c @@ -10,7 +10,8 @@ // P7 variables: li, addi, stxvw4x, lwa/lwz /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M|\mstxv\M} 6 } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mlwz\M|\mlwa\M|\mlwzx\M|\mlwax\M} 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c index d1e3b62373f..75eaf25943b 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c @@ -30,7 +30,7 @@ /* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlwz\M} 6 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c index 46e943faa6a..a495d9f3928 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c @@ -10,7 +10,8 @@ // P7 (be) constants: li, addi, stxvw4x, lha/lhz /* { dg-final { scan-assembler-times {\mli\M} 6 } } */ -/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 9 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M|\madd\M} 12 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */ /* { dg-final { scan-assembler-times {\mstxvw4x\M|\mstvx\M} 6 } } */ /* { dg-final { scan-assembler-times "lhz|lha|lhzx|lhax" 6 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c index 00685aca136..0ddecb4e4b5 100644 --- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c @@ -32,7 +32,7 @@ /* add and rlwinm instructions only on the variable tests. */ /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */ /* { dg-final { scan-assembler-times "rlwinm" 3 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\maddi\M} 9 { target ilp32 } } } */ /* { dg-final { scan-assembler-times {\mlha\M|\mlhz\M} 6 { target ilp32 } } } */