From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id BD10E3858C83; Fri, 21 Apr 2023 15:37:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org BD10E3858C83 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682091442; bh=pFbSHKTvbsf4w7/g3GaHo5rGSAt1hdtWrLoqva916SA=; h=From:To:Subject:Date:From; b=EhtpvreMRNI+YVFY4BaG+/uXGyw8Tb/omH81s94aiMJguNl2TQButDgHse96IaA/U YXdekgMIJJbeb6f3ggXsS20khEY8BTDHdEz8P3gcfFuMJHO1WC85kBk5WPvbfE7dCW Abr82AVGJZ/9perj7L/Wz4RwcQvA+jc17EDlFV2o= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Revert patches X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119 X-Git-Oldrev: a1f248363949c5533957524329b5a600f06c1dac X-Git-Newrev: 57672ca1115864a05acfdd195a88b077d75d16ae Message-Id: <20230421153722.BD10E3858C83@sourceware.org> Date: Fri, 21 Apr 2023 15:37:22 +0000 (GMT) List-Id: https://gcc.gnu.org/g:57672ca1115864a05acfdd195a88b077d75d16ae commit 57672ca1115864a05acfdd195a88b077d75d16ae Author: Michael Meissner Date: Fri Apr 21 11:37:19 2023 -0400 Revert patches Diff: --- gcc/config/rs6000/vsx.md | 69 ---------------------- .../gcc.target/powerpc/vec-extract-mem-char-2.c | 17 ------ .../gcc.target/powerpc/vec-extract-mem-int-3.c | 26 -------- .../gcc.target/powerpc/vec-extract-mem-short-2.c | 26 -------- 4 files changed, 138 deletions(-) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 3364a0791c2..d6b72a2fe33 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -4145,75 +4145,6 @@ (set_attr "length" "12,16,12,16") (set_attr "isa" "*,*,,")]) -;; Extract a V16QI/V8HI/V4SI element from memory with a variable element number -;; and zero extend it to DImode. -(define_insn_and_split "*vsx_extract__var_load_to_udi" - [(set (match_operand:DI 0 "register_operand" "=r,r,,") - (zero_extend:DI - (unspec: - [(match_operand:VSX_EXTRACT_I 1 "memory_operand" "Q,m,Q,m") - (match_operand:DI 2 "gpc_reg_operand" "r,r,r,r")] - UNSPEC_VSX_EXTRACT))) - (clobber (match_scratch:DI 3 "=X,&b,X,&b"))] - "VECTOR_MEM_VSX_P (mode) && TARGET_POWERPC64" - "#" - "&& 1" - [(set (match_dup 0) - (zero_extend:DI (match_dup 4)))] -{ - operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2], - operands[3], mode); -} - [(set_attr "type" "load,load,fpload,fpload") - (set_attr "length" "12,16,12,16") - (set_attr "isa" "*,*,,")]) - -;; Extract a V8HI/V4SI element from memory with a variable element number -;; and sign extend it to DImode. -(define_insn_and_split "*vsx_extract__var_load_to_sdi" - [(set (match_operand:DI 0 "register_operand" "=r,r,,") - (sign_extend:DI - (unspec: - [(match_operand:VSX_EXTRACT_ISIGN 1 "memory_operand" "Q,m,Q,m") - (match_operand:DI 2 "gpc_reg_operand" "r,r,r,r")] - UNSPEC_VSX_EXTRACT))) - (clobber (match_scratch:DI 3 "=X,&b,X,&b"))] - "VECTOR_MEM_VSX_P (mode) && TARGET_POWERPC64" - "#" - "&& 1" - [(set (match_dup 0) - (sign_extend:DI (match_dup 4)))] -{ - operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2], - operands[3], mode); -} - [(set_attr "type" "load,load,fpload,fpload") - (set_attr "length" "12,16,12,16") - (set_attr "isa" "*,*,,")]) - -;; Extract a V8HI element from memory with a variable element number -;; and zero or sign extend it to SImode. -(define_insn_and_split "*vsx_extract_v8hi_var_load_to_si" - [(set (match_operand:SI 0 "register_operand" "=r,r,v,v") - (any_extend:SI - (unspec: - [(match_operand:VSX_EXTRACT_I 1 "memory_operand" "Q,m,Q,m") - (match_operand:DI 2 "gpc_reg_operand" "r,r,r,r")] - UNSPEC_VSX_EXTRACT))) - (clobber (match_scratch:DI 3 "=X,&b,X,&b"))] - "VECTOR_MEM_VSX_P (V8HImode) && TARGET_POWERPC64" - "#" - "&& 1" - [(set (match_dup 0) - (any_extend:SI (match_dup 4)))] -{ - operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2], - operands[3], HImode); -} - [(set_attr "type" "load,load,fpload,fpload") - (set_attr "length" "12,16,16,20") - (set_attr "isa" "*,*,p9v,p9v")]) - ;; ISA 3.1 extract (define_expand "vextractl" [(set (match_operand:V2DI 0 "altivec_register_operand") diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-char-2.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-char-2.c deleted file mode 100644 index ee6fb79993a..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-char-2.c +++ /dev/null @@ -1,17 +0,0 @@ -/* { dg-do compile { target lp64 } } */ -/* { dg-options "-O2 -mvsx" } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ - -/* Test to verify that the vec_extract with variable element numbers can load - QImode and fold the zero extension into the load. */ - -#include -#include - -unsigned long long -extract_uns_var_v16qi (vector unsigned char *p, size_t n) -{ - return vec_extract (*p, n); /* lbzx, no rlwinm. */ -} - -/* { dg-final { scan-assembler-not {\mrlwinm\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-int-3.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-int-3.c deleted file mode 100644 index 437001a6177..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-int-3.c +++ /dev/null @@ -1,26 +0,0 @@ -/* { dg-do compile { target lp64 } } */ -/* { dg-options "-O2 -mvsx" } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ - -/* Test to verify that the vec_extract with variable element numbers can load - SImode and fold the sign/extension into the load. */ - -#include -#include - -long long -extract_sign_v4si_var (vector int *p, size_t n) -{ - return vec_extract (*p, n); /* lwax, no extsw. */ -} - -unsigned long long -extract_uns_v4si_var (vector unsigned int *p, size_t n) -{ - return vec_extract (*p, n); /* lwzx, no rldicl. */ -} - -/* { dg-final { scan-assembler-times {\mlwax\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mlwzx\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mrldicl\M} 2 } } */ -/* { dg-final { scan-assembler-not {\mextsw\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-short-2.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-short-2.c deleted file mode 100644 index efb5447f11b..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-mem-short-2.c +++ /dev/null @@ -1,26 +0,0 @@ -/* { dg-do compile { target lp64 } } */ -/* { dg-options "-O2 -mvsx" } */ -/* { dg-require-effective-target powerpc_vsx_ok } */ - -/* Test to verify that the vec_extract with variable element numbers can load - HImode and fold the sign/extension into the load. */ - -#include -#include - -long long -extract_sign_v8hi_var (vector short *p, size_t n) -{ - return vec_extract (*p, n); /* lwax, no extsw. */ -} - -unsigned long long -extract_uns_v8hi_var (vector unsigned short *p, size_t n) -{ - return vec_extract (*p, n); /* lwzx, no rlwinm. */ -} - -/* { dg-final { scan-assembler-times {\mlhax\M} 1 } } */ -/* { dg-final { scan-assembler-times {\mlhzx\M} 1 } } */ -/* { dg-final { scan-assembler-not {\mextsh\M} } } */ -/* { dg-final { scan-assembler-not {\mrlwinm\M} } } */