From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 32EFD3858D20; Fri, 21 Apr 2023 23:08:39 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 32EFD3858D20 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682118519; bh=W14etVvD0yvpcCpr9ervzFSR81hRf/fsWEdxlrHcu4Q=; h=From:To:Subject:Date:From; b=nRhUj1xNyUZfe2/FguHOo4U1icqDnMb7EdWTxb8vhN3dx20PACkuo7mWuG55HL5hr y2rhqxl/Rug3YNj2nuUECGnrEDsvOvfecSB0NKlycHPRq+jLM1jj2OWrABJpzHpF1j +1rvm6mcRaZE9RHYVcr7HMqEpCCBZXLLqDmFlMxM= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Update ChangeLog.* X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119 X-Git-Oldrev: 70ee48b31d4b97b697212187efafe8fa9ed71559 X-Git-Newrev: 5f950bc5b2949a2e6c07998b0517aa08a5945dc7 Message-Id: <20230421230839.32EFD3858D20@sourceware.org> Date: Fri, 21 Apr 2023 23:08:39 +0000 (GMT) List-Id: https://gcc.gnu.org/g:5f950bc5b2949a2e6c07998b0517aa08a5945dc7 commit 5f950bc5b2949a2e6c07998b0517aa08a5945dc7 Author: Michael Meissner Date: Fri Apr 21 19:08:35 2023 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 58 +++----------------------------------------------- 1 file changed, 3 insertions(+), 55 deletions(-) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 61634f875b1..c157e73db69 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,60 +1,8 @@ -==================== Branch work119, patch #52 ==================== +==================== Branch work119, patch #52 was reverted ==================== -Improve vec_extract of V4SF with variable element number. +==================== Branch work119, patch #51 was reverted ==================== -This patch adds a combine insn that merges loading up a vec_extract of V4SFmode -where the element number is variable combined with a conversion to DFmode. - -I also modified the insn for vec_extract of V4SFmode where the element number is -variable to split before register allocation. - -2023-04-21 Michael Meissner - -gcc/ - - * config/rs6000/vsx.md (vsx_extract_v4sf_var_load): Allow split before - register allocation. - (vsx_extract_v4sf_var_load_to_df): New insn. - -gcc/testsuite/ - - * gcc.target/powerpc/vec-extract-mem-float-2.c: New test. - -==================== Branch work119, patch #51 ==================== - -Combine vec_extract of V4SF with DF convert. - -This patch adds a combine insn that merges loading up a vec_extract of V4SFmode -where the element number is constant combined with a conversion to DFmode. - -In addition, I changed the vec_extract of V4SFmode where the element number is -constant without conversion to do the split before register allocation. I also -simplified the alternatives. - -2023-04-21 Michael Meissner - -gcc/ - - * config/rs6000/vsx.md (vsx_extract_v4sf_load): Allow split before - register allocation. - (vsx_extract_v4sf_to_df_load): New insn. - -gcc/testsuite/ - - * gcc.target/powerpc/vec-extract-mem-float-1.c: New test. - -==================== Branch work119, patch #50 ==================== - -Allow vec_extract support functions to be called before reload. - -2023-04-21 Michael Meissner - -gcc/ - - * config/rs6000/rs6000.cc (get_vector_offset): Allow being called before - register allocation. - (adjust_vec_address_pcrel): Likewise. - (rs6000_adjust_vec_address): Likewise. +==================== Branch work119, patch #50 was reverted ==================== ==================== Branch work119, patch #49 was reverted ====================