From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 494C13857702; Sat, 22 Apr 2023 05:50:22 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 494C13857702 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682142622; bh=FxZhaUG/D0t1cfSCvzI8SQsoyjtqNYklmEiC9BYj8IQ=; h=From:To:Subject:Date:From; b=J8CgShQSR1AW2MAxbEAfwhQQTDMm4Bnacp/nclAxjypGJfvhRlGrkXe+vu4mvS3oF CU+1efySR2WJkPSJbkpqOoLaoWn+arXofIKvH3y49pXS4af3j0jTr1eMo35QPzXjvY UL1Lx2MbwNrj58jaJsQUQ7mKkXr/EMEGg777Wbaw= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Revert patches X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119 X-Git-Oldrev: ce5fa8bf2140707ef44cbf30d643d673b502c738 X-Git-Newrev: 87f139aae746c657c417d0fb34c425d335a8ead3 Message-Id: <20230422055022.494C13857702@sourceware.org> Date: Sat, 22 Apr 2023 05:50:22 +0000 (GMT) List-Id: https://gcc.gnu.org/g:87f139aae746c657c417d0fb34c425d335a8ead3 commit 87f139aae746c657c417d0fb34c425d335a8ead3 Author: Michael Meissner Date: Sat Apr 22 01:50:18 2023 -0400 Revert patches Diff: --- gcc/config/rs6000/vsx.md | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index d088936915d..60f47d748a6 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -4083,12 +4083,12 @@ ;; Variable V16QI/V8HI/V4SI extract from memory (define_insn_and_split "*vsx_extract__var_load" - [(set (match_operand: 0 "gpc_reg_operand" "=r,") + [(set (match_operand: 0 "gpc_reg_operand" "=r") (unspec: - [(match_operand:VSX_EXTRACT_I 1 "memory_operand" "Q,Q") - (match_operand:DI 2 "gpc_reg_operand" "r,r")] + [(match_operand:VSX_EXTRACT_I 1 "memory_operand" "Q") + (match_operand:DI 2 "gpc_reg_operand" "r")] UNSPEC_VSX_EXTRACT)) - (clobber (match_scratch:DI 3 "=&b,&b"))] + (clobber (match_scratch:DI 3 "=&b"))] "VECTOR_MEM_VSX_P (mode) && TARGET_DIRECT_MOVE_64BIT" "#" "&& reload_completed" @@ -4097,8 +4097,7 @@ operands[4] = rs6000_adjust_vec_address (operands[0], operands[1], operands[2], operands[3], mode); } - [(set_attr "type" "load") - (set_attr "isa" "*,")]) + [(set_attr "type" "load")]) ;; ISA 3.1 extract (define_expand "vextractl"