From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2093) id 741F33858C2B; Mon, 24 Apr 2023 06:20:06 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 741F33858C2B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682317206; bh=GHN+3eNePIgzWXDqY+AiDbwjWRx2sH79oSzHvQjcJU4=; h=From:To:Subject:Date:From; b=I7C37Hfx3+iAonp4pI1QzRJMGRZrvkTShekOp4yVEElZAHtUvK+UYHAGDWQp5dETd 4zLXDp5rgPoESEqF8ODgZUvE3TiYXv/4f7hKLo5uVsZi61V4ZS+wgKfwm2avHAQ9Xq wNlQZ18FdafkKcgM94s4PyhJ+EF5C0dbTL+zVY8c= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kito Cheng To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-184] RISC-V: Add function comment for cleanup_insns. X-Act-Checkin: gcc X-Git-Author: Juzhe-Zhong X-Git-Refname: refs/heads/master X-Git-Oldrev: 4eae76d10433b12bdb6944c2b3be818ccc3b5986 X-Git-Newrev: c5a1fa59ae3f44059a79086cbc506800d4149b69 Message-Id: <20230424062006.741F33858C2B@sourceware.org> Date: Mon, 24 Apr 2023 06:20:06 +0000 (GMT) List-Id: https://gcc.gnu.org/g:c5a1fa59ae3f44059a79086cbc506800d4149b69 commit r14-184-gc5a1fa59ae3f44059a79086cbc506800d4149b69 Author: Juzhe-Zhong Date: Sun Apr 23 19:33:54 2023 +0800 RISC-V: Add function comment for cleanup_insns. Add more comment for cleanup_insns. gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function comment for cleanup_insns. Diff: --- gcc/config/riscv/riscv-vsetvl.cc | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index ac99028df43..fa68b8a0462 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -3998,6 +3998,21 @@ pass_vsetvl::pre_vsetvl (void) commit_edge_insertions (); } +/* Before VSETVL PASS, RVV instructions pattern is depending on AVL operand + implicitly. Since we will emit VSETVL instruction and make RVV instructions + depending on VL/VTYPE global status registers, we remove the such AVL operand + in the RVV instructions pattern here in order to remove AVL dependencies when + AVL operand is a register operand. + + Before the VSETVL PASS: + li a5,32 + ... + vadd.vv (..., a5) + After the VSETVL PASS: + li a5,32 + vsetvli zero, a5, ... + ... + vadd.vv (..., const_int 0). */ void pass_vsetvl::cleanup_insns (void) const {