From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1666) id B0A953858C27; Thu, 27 Apr 2023 08:38:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B0A953858C27 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682584684; bh=jLg5gGXyPMqMuUjVnDP55tBT11NJ+Kq4HKFfsUPKjjA=; h=From:To:Subject:Date:From; b=hN7gMkViRYNux3ZpO2a48VmX7+LxYEIGOWGEUiYk8c1AKTeq26/2DuNlSXeY71f8B EfCPgggB6Cd1e50mkstA9ZjbPKzSw24e/neWJau15S0x8D3Q9t90AP6dH7UPi3W8MB JpHZNJ00neJO3WVosm87Tz7mOsFjlc6Kgm4XGwO4= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Biener To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-285] tree-optimization/109594 - wrong register promotion X-Act-Checkin: gcc X-Git-Author: Richard Biener X-Git-Refname: refs/heads/master X-Git-Oldrev: d94ca762f6e0e4f117c1a61aa6d6613b2abc1216 X-Git-Newrev: 7bcdcf86e8272eeb524cc1dcb0ada8c8cfe6f27e Message-Id: <20230427083804.B0A953858C27@sourceware.org> Date: Thu, 27 Apr 2023 08:38:04 +0000 (GMT) List-Id: https://gcc.gnu.org/g:7bcdcf86e8272eeb524cc1dcb0ada8c8cfe6f27e commit r14-285-g7bcdcf86e8272eeb524cc1dcb0ada8c8cfe6f27e Author: Richard Biener Date: Mon Apr 24 13:20:25 2023 +0200 tree-optimization/109594 - wrong register promotion We fail to verify the constraints under which we allow handled components to wrap registers. The gcc.dg/pr70022.c testcase shows that we happily end up with _2 = VIEW_CONVERT_EXPR(v_1(D)) as produced by SSA rewrite and update_address_taken. But the intent was that we wrap registers with at most a single level of handled components and specifically only allow __real, __imag, BIT_FIELD_REF and VIEW_CONVERT_EXPR on them, but not ARRAY_REF or COMPONENT_REF. Together with the improved gimple_load predicate taking advantage of the above and ASAN this eventually ICEd. The following fixes update_address_taken as to this constraint. PR tree-optimization/109594 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain what we rewrite to a register based on the above. Diff: --- gcc/tree-ssa.cc | 35 ++++++++++++++++++++++++++++------- 1 file changed, 28 insertions(+), 7 deletions(-) diff --git a/gcc/tree-ssa.cc b/gcc/tree-ssa.cc index 4ca1f5f3104..70828355c2b 100644 --- a/gcc/tree-ssa.cc +++ b/gcc/tree-ssa.cc @@ -1572,14 +1572,30 @@ non_rewritable_mem_ref_base (tree ref) if (DECL_P (ref)) return NULL_TREE; - if (! (base = CONST_CAST_TREE (strip_invariant_refs (ref)))) + switch (TREE_CODE (ref)) { - base = get_base_address (ref); - if (DECL_P (base)) - return base; - return NULL_TREE; + case REALPART_EXPR: + case IMAGPART_EXPR: + case BIT_FIELD_REF: + if (DECL_P (TREE_OPERAND (ref, 0))) + return NULL_TREE; + break; + case VIEW_CONVERT_EXPR: + if (DECL_P (TREE_OPERAND (ref, 0))) + { + if (TYPE_SIZE (TREE_TYPE (ref)) + != TYPE_SIZE (TREE_TYPE (TREE_OPERAND (ref, 0)))) + return TREE_OPERAND (ref, 0); + return NULL_TREE; + } + break; + /* We would need to rewrite ARRAY_REFs or COMPONENT_REFs and even + more so multiple levels of handled components. */ + default:; } + base = ref; + /* But watch out for MEM_REFs we cannot lower to a VIEW_CONVERT_EXPR or a BIT_FIELD_REF. */ if (TREE_CODE (base) == MEM_REF @@ -1630,9 +1646,14 @@ non_rewritable_mem_ref_base (tree ref) return decl; } + /* We cannot rewrite a decl in the base. */ + base = get_base_address (ref); + if (DECL_P (base)) + return base; + /* We cannot rewrite TARGET_MEM_REFs. */ - if (TREE_CODE (base) == TARGET_MEM_REF - && TREE_CODE (TREE_OPERAND (base, 0)) == ADDR_EXPR) + else if (TREE_CODE (base) == TARGET_MEM_REF + && TREE_CODE (TREE_OPERAND (base, 0)) == ADDR_EXPR) { tree decl = TREE_OPERAND (TREE_OPERAND (base, 0), 0); if (! DECL_P (decl))