From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1666) id 4323A3858C31; Thu, 27 Apr 2023 13:18:55 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 4323A3858C31 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682601535; bh=gC2XpvSw42LL2KdBdIgG0G5kW0UGQv/9ndmt+cT1LY8=; h=From:To:Subject:Date:From; b=wK0FHL1CHiUkp+HM3mHF9LJq9SlfSdLGFoLldKBmqbkNlvWrjGNGyi8DnsI2dMrJq xloP3UjU3Do//q7bQiJKn+hr2vTFmtpEVJGGXuQhYylNxH0JwB6mUl1h198bu1cf/X 4oE+i9pFiHey2lPYURoXY4tlI8boSVuT4iOghbBM= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Richard Biener To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-9479] x86: Disable -mforce-indirect-call for PIC in 32-bit mode X-Act-Checkin: gcc X-Git-Author: H.J. Lu X-Git-Refname: refs/heads/releases/gcc-12 X-Git-Oldrev: ea162107bb376f5ffa18bbda70e14b47bc338070 X-Git-Newrev: 37da428922e5cb548430aa00482d6a4c7aa8f8b2 Message-Id: <20230427131855.4323A3858C31@sourceware.org> Date: Thu, 27 Apr 2023 13:18:55 +0000 (GMT) List-Id: https://gcc.gnu.org/g:37da428922e5cb548430aa00482d6a4c7aa8f8b2 commit r12-9479-g37da428922e5cb548430aa00482d6a4c7aa8f8b2 Author: H.J. Lu Date: Mon Jan 16 10:45:41 2023 -0800 x86: Disable -mforce-indirect-call for PIC in 32-bit mode -mforce-indirect-call generates invalid instruction in 32-bit MI thunk since there are no available scratch registers in 32-bit PIC mode. Disable -mforce-indirect-call for PIC in 32-bit mode when generating MI thunk. gcc/ PR target/105980 * config/i386/i386.cc (x86_output_mi_thunk): Disable -mforce-indirect-call for PIC in 32-bit mode. gcc/testsuite/ PR target/105980 * g++.target/i386/pr105980.C: New test. (cherry picked from commit a396a123596d82d4a2f14dc43a382cb17826411c) Diff: --- gcc/config/i386/i386.cc | 6 ++++++ gcc/testsuite/g++.target/i386/pr105980.C | 8 ++++++++ 2 files changed, 14 insertions(+) diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index 85402f851bf..9a9ff3b34b8 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -21211,6 +21211,7 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, rtx this_reg, tmp, fnaddr; unsigned int tmp_regno; rtx_insn *insn; + int saved_flag_force_indirect_call = flag_force_indirect_call; if (TARGET_64BIT) tmp_regno = R10_REG; @@ -21223,6 +21224,9 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, tmp_regno = DX_REG; else tmp_regno = CX_REG; + + if (flag_pic) + flag_force_indirect_call = 0; } emit_note (NOTE_INSN_PROLOGUE_END); @@ -21390,6 +21394,8 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta, final (insn, file, 1); final_end_function (); assemble_end_function (thunk_fndecl, fnname); + + flag_force_indirect_call = saved_flag_force_indirect_call; } static void diff --git a/gcc/testsuite/g++.target/i386/pr105980.C b/gcc/testsuite/g++.target/i386/pr105980.C new file mode 100644 index 00000000000..d8dbc332ea2 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr105980.C @@ -0,0 +1,8 @@ +// { dg-do assemble { target { fpic } } } +// { dg-options "-O0 -fpic -mforce-indirect-call" } + +struct A { + virtual ~A(); +}; +struct B : virtual A {}; +void bar() { B(); }