From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 7E99C3858D28; Mon, 1 May 2023 17:24:15 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7E99C3858D28 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1682961855; bh=9OCRAyk0ygZCZx2mhi5656g4b7ml+wODOYhwdwqIwac=; h=From:To:Subject:Date:From; b=wUQBpAJYcqczF06yoLWh03SI7OhEHIfFStgNTPm5HZbh5VnafYAwKFF1uHp7qLf8C /7d6KG6pDJXn13g+/nVBseohqzO8x0OjEvQxM8+ayOHxAxiowcjTAbv7kqXB9Cy/kf E08v5vzVUsJtL7YyBmdj/d5EeSkRqKpks8PRDa3Q= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work119)] Update ChangeLog.meissner X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work119 X-Git-Oldrev: 67313a509367e6b2bc5382d33076452fa67d40da X-Git-Newrev: 6702108df42f9135e32cdffdaae8055122b0bafc Message-Id: <20230501172415.7E99C3858D28@sourceware.org> Date: Mon, 1 May 2023 17:24:15 +0000 (GMT) List-Id: https://gcc.gnu.org/g:6702108df42f9135e32cdffdaae8055122b0bafc commit 6702108df42f9135e32cdffdaae8055122b0bafc Author: Michael Meissner Date: Mon May 1 13:24:12 2023 -0400 Update ChangeLog.meissner Diff: --- gcc/ChangeLog.meissner | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner index 85bfbce8419..7a3f8e4b578 100644 --- a/gcc/ChangeLog.meissner +++ b/gcc/ChangeLog.meissner @@ -1,3 +1,33 @@ +==================== Branch work119, patch #130 ==================== + +Split vec_extract from memory before reload for V16QI/V8HI/V4SI with constant elements. + +This patch goes through the support function rs6000_adjust_vec_address and the +functions it calls to allow them to be called before register allocation. The +places that take a scratch register will allocate a new pseudo register if they +are passed a SCRATCH register. + +It then changes the vec_extract support for V16QI/V8HI/V4SI with constant +element numbers to be split before register allocation. + +2023-04-27 Michael Meissner + +gcc/ + + * config/rs6000/rs6000.cc (get_vector_offset): Allow function to be + called before register allocation. + (adjust_vec_address_pcrel): Likewise. + (rs6000_adjust_vec_address): Likewise. + * config/rs6000/vsx.md (vsx_extract__load): Split before register + allocation. + (vsx_extract_v4si_load_to_di): Likewise. + (vsx_extract__load_to_u): Likewise. + (*vsx_extract_v8hi_load_to_s): Likewise. + (vsx_extract__var_load): Likewise. + (vsx_extract_v4si_var_load_to_di): Likewise. + (vsx_extract__var_load_to_u): Likewise. + (vsx_extract_v8hi_var_load_to_s): Likewise. + ==================== Branch work119, patch #127 ==================== Optimize variable element vec_extract to be converted to floating point