[gcc(refs/users/meissner/heads/work121)] Revert patches

[Michael Meissner <meissner@gcc.gnu.org>]

https://gcc.gnu.org/g:0bdac3f5cf620df86a3e9a0bfd2e2ba655921a68

commit 0bdac3f5cf620df86a3e9a0bfd2e2ba655921a68
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue May 9 12:28:18 2023 -0400

    Revert patches

Diff:
---
 gcc/config/rs6000/fusion.md                        | 17 ++++++--------
 gcc/config/rs6000/genfusion.pl                     | 17 +++++---------
 gcc/testsuite/g++.target/powerpc/pr105325.C        | 26 ----------------------
 .../gcc.target/powerpc/fusion-p10-ldcmpi.c         |  4 ++--
 4 files changed, 14 insertions(+), 50 deletions(-)

diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md
index da9953d9ad9..d45fb138a70 100644
--- a/gcc/config/rs6000/fusion.md
+++ b/gcc/config/rs6000/fusion.md
@@ -22,7 +22,7 @@
 ;; load mode is DI result mode is clobber compare mode is CC extend is none
 (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none"
   [(set (match_operand:CC 2 "cc_reg_operand" "=x")
-        (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+        (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
                     (match_operand:DI 3 "const_m1_to_1_operand" "n")))
    (clobber (match_scratch:DI 0 "=r"))]
   "(TARGET_P10_FUSION)"
@@ -43,7 +43,7 @@
 ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none
 (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none"
   [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
-        (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+        (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
                        (match_operand:DI 3 "const_0_to_1_operand" "n")))
    (clobber (match_scratch:DI 0 "=r"))]
   "(TARGET_P10_FUSION)"
@@ -64,7 +64,7 @@
 ;; load mode is DI result mode is DI compare mode is CC extend is none
 (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none"
   [(set (match_operand:CC 2 "cc_reg_operand" "=x")
-        (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+        (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m")
                     (match_operand:DI 3 "const_m1_to_1_operand" "n")))
    (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
   "(TARGET_P10_FUSION)"
@@ -85,7 +85,7 @@
 ;; load mode is DI result mode is DI compare mode is CCUNS extend is none
 (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none"
   [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x")
-        (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "YZ")
+        (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m")
                        (match_operand:DI 3 "const_0_to_1_operand" "n")))
    (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))]
   "(TARGET_P10_FUSION)"
@@ -106,7 +106,7 @@
 ;; load mode is SI result mode is clobber compare mode is CC extend is none
 (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none"
   [(set (match_operand:CC 2 "cc_reg_operand" "=x")
-        (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+        (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                     (match_operand:SI 3 "const_m1_to_1_operand" "n")))
    (clobber (match_scratch:SI 0 "=r"))]
   "(TARGET_P10_FUSION)"
@@ -148,7 +148,7 @@
 ;; load mode is SI result mode is SI compare mode is CC extend is none
 (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none"
   [(set (match_operand:CC 2 "cc_reg_operand" "=x")
-        (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+        (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                     (match_operand:SI 3 "const_m1_to_1_operand" "n")))
    (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))]
   "(TARGET_P10_FUSION)"
@@ -190,7 +190,7 @@
 ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign
 (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign"
   [(set (match_operand:CC 2 "cc_reg_operand" "=x")
-        (compare:CC (match_operand:SI 1 "lwa_operand" "YZ")
+        (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m")
                     (match_operand:SI 3 "const_m1_to_1_operand" "n")))
    (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))]
   "(TARGET_P10_FUSION)"
@@ -205,7 +205,6 @@
   ""
   [(set_attr "type" "fused_load_cmpi")
    (set_attr "cost" "8")
-   (set_attr "sign_extend" "yes")
    (set_attr "length" "8")])
 
 ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -248,7 +247,6 @@
   ""
   [(set_attr "type" "fused_load_cmpi")
    (set_attr "cost" "8")
-   (set_attr "sign_extend" "yes")
    (set_attr "length" "8")])
 
 ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
@@ -291,7 +289,6 @@
   ""
   [(set_attr "type" "fused_load_cmpi")
    (set_attr "cost" "8")
-   (set_attr "sign_extend" "yes")
    (set_attr "length" "8")])
 
 ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10
diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl
index ca16ee8576d..de55f224912 100755
--- a/gcc/config/rs6000/genfusion.pl
+++ b/gcc/config/rs6000/genfusion.pl
@@ -85,12 +85,11 @@ sub print_ld_cmpi_p10
   # DI-mode doesn't do sign/zero extension.
   my $echr = ($lmode eq "DI") ? "" : $a_or_z;
 
-  # Handle DS vs. D format memory.  Special case using lwa_operand for SImode.
-  my $ds_load = ($lmode eq "SI") ? "lwa_operand" : "ds_form_mem_operand";
-  my ($np, $constraint, $mempred)
+  # Handle DS vs. D format memory.
+  my ($np, $mempred)
 	= (($mem_format eq "ds")
-	   ? ("NON_PREFIXED_DS", "YZ", $ds_load)
-	   : ("NON_PREFIXED_D",  "m",  "non_update_memory_operand"));
+	   ? ("NON_PREFIXED_DS", "ds_form_mem_operand")
+	   : ("NON_PREFIXED_D",  "non_update_memory_operand"));
 
   # Break long print statements into smaller lines.
   my $info = join (" ",
@@ -101,7 +100,7 @@ sub print_ld_cmpi_p10
 		   "l${ldst}${echr}_cmp${cmpl}di_cr0_${lmode}",
 		   "_${result}_${ccmode}_${extend}");
 
-  my $cmp_op1 = "(match_operand:${lmode} 1 \"${mempred}\" \"${constraint}\")";
+  my $cmp_op1 = "(match_operand:${lmode} 1 \"${mempred}\" \"m\")";
 
   my $spaces = " " x (length ($ccmode) + 18);
 
@@ -149,12 +148,6 @@ sub print_ld_cmpi_p10
   print "  \"\"\n";
   print "  [(set_attr \"type\" \"fused_load_cmpi\")\n";
   print "   (set_attr \"cost\" \"8\")\n";
-
-  if ($extend eq "sign")
-    {
-      print "   (set_attr \"sign_extend\" \"yes\")\n";
-    }
-
   print "   (set_attr \"length\" \"8\")])\n";
   print "\n";
 }
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
deleted file mode 100644
index d0e66a0b897..00000000000
--- a/gcc/testsuite/g++.target/powerpc/pr105325.C
+++ /dev/null
@@ -1,26 +0,0 @@
-/* { dg-do assemble } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-require-effective-target power10_ok } */
-/* { dg-require-effective-target powerpc_prefixed_addr } */
-/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
-
-/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
-   instead of PLWZ/CMPWI.  Ultimately the code was dying because the fusion
-   load + compare -1/0/1 patterns did not handle the possibility that the load
-   might be prefixed.  The -fstack-protector option is needed to show the
-   bug.  */
-
-struct Ath__array1D {
-  int _current;
-  int getCnt() { return _current; }
-};
-struct extMeasure {
-  int _mapTable[10000];
-  Ath__array1D _metRCTable;
-};
-void measureRC() {
-  extMeasure m;
-  for (; m._metRCTable.getCnt();)
-    for (;;)
-      ;
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index ca7297375a4..526a026d874 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -61,7 +61,7 @@ TEST(int8_t)
 /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"      16 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   4 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target lp64 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       4 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target lp64 } } } */
 /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   2 { target lp64 } } } */
 
@@ -73,6 +73,6 @@ TEST(int8_t)
 /* { dg-final { scan-assembler-times "lha_cmpdi_cr0_HI_clobber_CC_sign"       8 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "lhz_cmpldi_cr0_HI_clobber_CCUNS_zero"   2 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_EXTSI_CC_sign"         0 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"      16 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "lwa_cmpdi_cr0_SI_clobber_CC_none"       9 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_EXTSI_CCUNS_zero"     0 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times "lwz_cmpldi_cr0_SI_clobber_CCUNS_none"   6 { target ilp32 } } } */