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* [gcc r14-1016] target/105753: Fix ICE in add_clobbers due to extra PARALLEL in insn.
@ 2023-05-20 5:53 Georg-Johann Lay
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From: Georg-Johann Lay @ 2023-05-20 5:53 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:80348e6aec44966e20ca1ca823247ce1381071eb
commit r14-1016-g80348e6aec44966e20ca1ca823247ce1381071eb
Author: Triffid Hunter <triffid.hunter@gmail.com>
Date: Sat May 20 07:50:00 2023 +0200
target/105753: Fix ICE in add_clobbers due to extra PARALLEL in insn.
This patch removes the superfluous parallel in [u]divmod patterns in
the AVR backend. Effect of extra parallel is that add_clobbers reaches
gcc_unreachable() because the clobbers for [u]divmod are missing.
If an insn has multiple parts like clobbers, the parallel around the
parts of the insn pattern is implicit.
gcc/
PR target/105753
* config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
Remove superfluous "parallel" in insn pattern.
([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
printing error text to assembly.
gcc/testsuite/
PR target/105753
* gcc.target/avr/torture/pr105753.c: New test.
Diff:
---
gcc/config/avr/avr.md | 126 ++++++++++++------------
gcc/testsuite/gcc.target/avr/torture/pr105753.c | 13 +++
2 files changed, 77 insertions(+), 62 deletions(-)
diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md
index 43b75046384..a79c6824fad 100644
--- a/gcc/config/avr/avr.md
+++ b/gcc/config/avr/avr.md
@@ -3705,17 +3705,17 @@
;; CSE has problems to operate on hard regs.
;;
(define_insn_and_split "divmodqi4"
- [(set (match_operand:QI 0 "pseudo_register_operand" "")
- (div:QI (match_operand:QI 1 "pseudo_register_operand" "")
- (match_operand:QI 2 "pseudo_register_operand" "")))
- (set (match_operand:QI 3 "pseudo_register_operand" "")
+ [(set (match_operand:QI 0 "pseudo_register_operand")
+ (div:QI (match_operand:QI 1 "pseudo_register_operand")
+ (match_operand:QI 2 "pseudo_register_operand")))
+ (set (match_operand:QI 3 "pseudo_register_operand")
(mod:QI (match_dup 1) (match_dup 2)))
(clobber (reg:QI 22))
(clobber (reg:QI 23))
(clobber (reg:QI 24))
(clobber (reg:QI 25))]
""
- "this divmodqi4 pattern should have been splitted;"
+ { gcc_unreachable(); }
""
[(set (reg:QI 24) (match_dup 1))
(set (reg:QI 22) (match_dup 2))
@@ -3751,17 +3751,17 @@
[(set_attr "type" "xcall")])
(define_insn_and_split "udivmodqi4"
- [(set (match_operand:QI 0 "pseudo_register_operand" "")
- (udiv:QI (match_operand:QI 1 "pseudo_register_operand" "")
- (match_operand:QI 2 "pseudo_register_operand" "")))
- (set (match_operand:QI 3 "pseudo_register_operand" "")
- (umod:QI (match_dup 1) (match_dup 2)))
- (clobber (reg:QI 22))
- (clobber (reg:QI 23))
- (clobber (reg:QI 24))
- (clobber (reg:QI 25))]
- ""
- "this udivmodqi4 pattern should have been splitted;"
+ [(set (match_operand:QI 0 "pseudo_register_operand")
+ (udiv:QI (match_operand:QI 1 "pseudo_register_operand")
+ (match_operand:QI 2 "pseudo_register_operand")))
+ (set (match_operand:QI 3 "pseudo_register_operand")
+ (umod:QI (match_dup 1) (match_dup 2)))
+ (clobber (reg:QI 22))
+ (clobber (reg:QI 23))
+ (clobber (reg:QI 24))
+ (clobber (reg:QI 25))]
+ ""
+ { gcc_unreachable(); }
""
[(set (reg:QI 24) (match_dup 1))
(set (reg:QI 22) (match_dup 2))
@@ -3793,17 +3793,17 @@
[(set_attr "type" "xcall")])
(define_insn_and_split "divmodhi4"
- [(set (match_operand:HI 0 "pseudo_register_operand" "")
- (div:HI (match_operand:HI 1 "pseudo_register_operand" "")
- (match_operand:HI 2 "pseudo_register_operand" "")))
- (set (match_operand:HI 3 "pseudo_register_operand" "")
+ [(set (match_operand:HI 0 "pseudo_register_operand")
+ (div:HI (match_operand:HI 1 "pseudo_register_operand")
+ (match_operand:HI 2 "pseudo_register_operand")))
+ (set (match_operand:HI 3 "pseudo_register_operand")
(mod:HI (match_dup 1) (match_dup 2)))
(clobber (reg:QI 21))
(clobber (reg:HI 22))
(clobber (reg:HI 24))
(clobber (reg:HI 26))]
""
- "this should have been splitted;"
+ { gcc_unreachable(); }
""
[(set (reg:HI 24) (match_dup 1))
(set (reg:HI 22) (match_dup 2))
@@ -3839,17 +3839,17 @@
[(set_attr "type" "xcall")])
(define_insn_and_split "udivmodhi4"
- [(set (match_operand:HI 0 "pseudo_register_operand" "")
- (udiv:HI (match_operand:HI 1 "pseudo_register_operand" "")
- (match_operand:HI 2 "pseudo_register_operand" "")))
- (set (match_operand:HI 3 "pseudo_register_operand" "")
+ [(set (match_operand:HI 0 "pseudo_register_operand")
+ (udiv:HI (match_operand:HI 1 "pseudo_register_operand")
+ (match_operand:HI 2 "pseudo_register_operand")))
+ (set (match_operand:HI 3 "pseudo_register_operand")
(umod:HI (match_dup 1) (match_dup 2)))
(clobber (reg:QI 21))
(clobber (reg:HI 22))
(clobber (reg:HI 24))
(clobber (reg:HI 26))]
""
- "this udivmodhi4 pattern should have been splitted.;"
+ { gcc_unreachable(); }
""
[(set (reg:HI 24) (match_dup 1))
(set (reg:HI 22) (match_dup 2))
@@ -4090,14 +4090,14 @@
;; implementation works the other way round.
(define_insn_and_split "divmodpsi4"
- [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
- (div:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
- (match_operand:PSI 2 "pseudo_register_operand" "")))
- (set (match_operand:PSI 3 "pseudo_register_operand" "")
- (mod:PSI (match_dup 1)
- (match_dup 2)))
- (clobber (reg:DI 18))
- (clobber (reg:QI 26))])]
+ [(set (match_operand:PSI 0 "pseudo_register_operand")
+ (div:PSI (match_operand:PSI 1 "pseudo_register_operand")
+ (match_operand:PSI 2 "pseudo_register_operand")))
+ (set (match_operand:PSI 3 "pseudo_register_operand")
+ (mod:PSI (match_dup 1)
+ (match_dup 2)))
+ (clobber (reg:DI 18))
+ (clobber (reg:QI 26))]
""
{ gcc_unreachable(); }
""
@@ -4139,14 +4139,14 @@
[(set_attr "type" "xcall")])
(define_insn_and_split "udivmodpsi4"
- [(parallel [(set (match_operand:PSI 0 "pseudo_register_operand" "")
- (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand" "")
- (match_operand:PSI 2 "pseudo_register_operand" "")))
- (set (match_operand:PSI 3 "pseudo_register_operand" "")
- (umod:PSI (match_dup 1)
- (match_dup 2)))
- (clobber (reg:DI 18))
- (clobber (reg:QI 26))])]
+ [(set (match_operand:PSI 0 "pseudo_register_operand")
+ (udiv:PSI (match_operand:PSI 1 "pseudo_register_operand")
+ (match_operand:PSI 2 "pseudo_register_operand")))
+ (set (match_operand:PSI 3 "pseudo_register_operand")
+ (umod:PSI (match_dup 1)
+ (match_dup 2)))
+ (clobber (reg:DI 18))
+ (clobber (reg:QI 26))]
""
{ gcc_unreachable(); }
""
@@ -4190,17 +4190,18 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
(define_insn_and_split "divmodsi4"
- [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
- (div:SI (match_operand:SI 1 "pseudo_register_operand" "")
- (match_operand:SI 2 "pseudo_register_operand" "")))
- (set (match_operand:SI 3 "pseudo_register_operand" "")
- (mod:SI (match_dup 1) (match_dup 2)))
- (clobber (reg:SI 18))
- (clobber (reg:SI 22))
- (clobber (reg:HI 26))
- (clobber (reg:HI 30))])]
+ [(set (match_operand:SI 0 "pseudo_register_operand")
+ (div:SI (match_operand:SI 1 "pseudo_register_operand")
+ (match_operand:SI 2 "pseudo_register_operand")))
+ (set (match_operand:SI 3 "pseudo_register_operand")
+ (mod:SI (match_dup 1)
+ (match_dup 2)))
+ (clobber (reg:SI 18))
+ (clobber (reg:SI 22))
+ (clobber (reg:HI 26))
+ (clobber (reg:HI 30))]
""
- "this divmodsi4 pattern should have been splitted;"
+ { gcc_unreachable(); }
""
[(set (reg:SI 22) (match_dup 1))
(set (reg:SI 18) (match_dup 2))
@@ -4236,17 +4237,18 @@
[(set_attr "type" "xcall")])
(define_insn_and_split "udivmodsi4"
- [(parallel [(set (match_operand:SI 0 "pseudo_register_operand" "")
- (udiv:SI (match_operand:SI 1 "pseudo_register_operand" "")
- (match_operand:SI 2 "pseudo_register_operand" "")))
- (set (match_operand:SI 3 "pseudo_register_operand" "")
- (umod:SI (match_dup 1) (match_dup 2)))
- (clobber (reg:SI 18))
- (clobber (reg:SI 22))
- (clobber (reg:HI 26))
- (clobber (reg:HI 30))])]
+ [(set (match_operand:SI 0 "pseudo_register_operand")
+ (udiv:SI (match_operand:SI 1 "pseudo_register_operand")
+ (match_operand:SI 2 "pseudo_register_operand")))
+ (set (match_operand:SI 3 "pseudo_register_operand")
+ (umod:SI (match_dup 1)
+ (match_dup 2)))
+ (clobber (reg:SI 18))
+ (clobber (reg:SI 22))
+ (clobber (reg:HI 26))
+ (clobber (reg:HI 30))]
""
- "this udivmodsi4 pattern should have been splitted;"
+ { gcc_unreachable(); }
""
[(set (reg:SI 22) (match_dup 1))
(set (reg:SI 18) (match_dup 2))
diff --git a/gcc/testsuite/gcc.target/avr/torture/pr105753.c b/gcc/testsuite/gcc.target/avr/torture/pr105753.c
new file mode 100644
index 00000000000..7d7cea1de7a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/torture/pr105753.c
@@ -0,0 +1,13 @@
+int digit_sum (unsigned long n)
+{
+ int sum = 0;
+
+ do
+ {
+ int x = n % 10;
+ n /= 10;
+ sum += x;
+ } while(n);
+
+ return sum;
+}
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