From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1729) id C81B63858C78; Mon, 22 May 2023 19:59:58 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C81B63858C78 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684785598; bh=zwOrqNUXABZyJBQK76qxOPAKPbm0ac7bqzd803BFEvk=; h=From:To:Subject:Date:From; b=KhbkKh0fdDrBQxUDF0w3OR2UU6E2XHG0yZ8WjtFaBkzPn21mIuZ47jQAIug1E9Zna WgvL9JNYdQXtJ2gqcZXpbuEMA1PcSOuovG0cXKH9P1MrBWgHXax4X6twNHwWHTmhF6 abLfK4k55N5kqyYZktXJTCNXDMUZLU3oZ459nczU= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Kwok Yeung To: gcc-cvs@gcc.gnu.org, libstdc++-cvs@gcc.gnu.org Subject: [gcc/devel/omp/gcc-13] Merge branch 'releases/gcc-13' into devel/omp/gcc-13 X-Act-Checkin: gcc X-Git-Author: Kwok Cheung Yeung X-Git-Refname: refs/heads/devel/omp/gcc-13 X-Git-Oldrev: 83983b4363ad3cf339c2018e7271ce916ded55ff X-Git-Newrev: 92f6019f103b579e8822a8d3cca16fcec96e1b1e Message-Id: <20230522195958.C81B63858C78@sourceware.org> Date: Mon, 22 May 2023 19:59:58 +0000 (GMT) List-Id: https://gcc.gnu.org/g:92f6019f103b579e8822a8d3cca16fcec96e1b1e commit 92f6019f103b579e8822a8d3cca16fcec96e1b1e Merge: 83983b4363a 0feece18e69 Author: Kwok Cheung Yeung Date: Mon May 22 20:09:16 2023 +0100 Merge branch 'releases/gcc-13' into devel/omp/gcc-13 Diff: ChangeLog | 11 + c++tools/ChangeLog | 4 + config/ChangeLog | 4 + configure | 12 + configure.ac | 12 + contrib/ChangeLog | 11 + contrib/gennews | 1 + contrib/header-tools/ChangeLog | 4 + contrib/reghunt/ChangeLog | 4 + contrib/regression/ChangeLog | 4 + fixincludes/ChangeLog | 4 + gcc/BASE-VER | 2 +- gcc/ChangeLog | 566 ++ gcc/DATESTAMP | 2 +- gcc/DEV-PHASE | 1 - gcc/ada/ChangeLog | 4 + gcc/analyzer/ChangeLog | 4 + gcc/attr-fnspec.h | 4 +- gcc/c-family/ChangeLog | 19 + gcc/c-family/c-cppbuiltin.cc | 1 + gcc/c-family/c.opt | 2 +- gcc/c/ChangeLog | 33 + gcc/c/c-decl.cc | 9 +- gcc/c/c-parser.cc | 11 +- gcc/c/c-typeck.cc | 5 + gcc/config/aarch64/aarch64-builtins.cc | 2 +- gcc/config/aarch64/aarch64-protos.h | 4 +- gcc/config/aarch64/aarch64.cc | 5 - gcc/config/arm/arm_mve.h | 2066 +++--- gcc/config/arm/constraints.md | 20 +- gcc/config/arm/mve.md | 158 +- gcc/config/arm/predicates.md | 14 +- gcc/config/avr/avr.md | 126 +- gcc/config/gcn/gcn-valu.md | 271 +- gcc/config/gcn/gcn.cc | 9 + gcc/config/gcn/gcn.md | 8 +- gcc/config/i386/i386-builtin-types.def | 2 +- gcc/config/i386/i386-features.cc | 9 +- gcc/config/nvptx/mkoffload.cc | 14 + gcc/config/riscv/linux.h | 10 - gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv-vsetvl.cc | 14 +- gcc/config/riscv/riscv.cc | 49 + gcc/config/riscv/riscv.opt | 4 + gcc/config/riscv/sync.md | 303 +- gcc/config/rs6000/altivec.md | 14 +- gcc/config/rs6000/predicates.md | 37 + gcc/config/rs6000/rs6000-builtins.def | 26 +- gcc/config/rs6000/rs6000.cc | 11 +- gcc/cp/ChangeLog | 157 + gcc/cp/call.cc | 16 +- gcc/cp/constexpr.cc | 11 +- gcc/cp/cp-gimplify.cc | 28 +- gcc/cp/decl.cc | 23 +- gcc/cp/decl2.cc | 9 +- gcc/cp/friend.cc | 92 +- gcc/cp/init.cc | 44 +- gcc/cp/name-lookup.cc | 37 + gcc/cp/name-lookup.h | 2 + gcc/cp/parser.cc | 13 +- gcc/cp/pt.cc | 103 +- gcc/cp/typeck.cc | 6 +- gcc/cp/typeck2.cc | 26 +- gcc/d/ChangeLog | 4 + gcc/doc/extend.texi | 140 +- gcc/doc/install.texi | 202 +- gcc/doc/invoke.texi | 13 +- gcc/doc/md.texi | 9 + gcc/fortran/ChangeLog | 49 + gcc/fortran/arith.cc | 6 + gcc/fortran/expr.cc | 2 +- gcc/fortran/gfortran.h | 1 + gcc/fortran/openmp.cc | 16 + gcc/fortran/resolve.cc | 37 + gcc/fortran/trans-openmp.cc | 44 +- gcc/gimple-range-fold.cc | 16 +- gcc/gimple-ssa-warn-access.cc | 56 +- gcc/go/ChangeLog | 4 + gcc/jit/ChangeLog | 4 + gcc/lto-cgraph.cc | 2 +- gcc/lto/ChangeLog | 4 + gcc/m2/ChangeLog | 4 + gcc/match.pd | 23 +- gcc/objc/ChangeLog | 4 + gcc/objcp/ChangeLog | 4 + gcc/po/ChangeLog | 22 + gcc/po/be.po | 3931 ++++++------ gcc/po/da.po | 3940 ++++++------ gcc/po/de.po | 3938 ++++++------ gcc/po/el.po | 3927 ++++++------ gcc/po/es.po | 3942 ++++++------ gcc/po/fi.po | 3931 ++++++------ gcc/po/fr.po | 3938 ++++++------ gcc/po/gcc.pot | 3927 ++++++------ gcc/po/hr.po | 4821 +++++++------- gcc/po/id.po | 3931 ++++++------ gcc/po/ja.po | 3931 ++++++------ gcc/po/nl.po | 3931 ++++++------ gcc/po/ru.po | 3942 ++++++------ gcc/po/sr.po | 3931 ++++++------ gcc/po/sv.po | 4677 +++++++------- gcc/po/tr.po | 3936 ++++++------ gcc/po/uk.po | 3938 ++++++------ gcc/po/vi.po | 3940 ++++++------ gcc/po/zh_CN.po | 4054 ++++++------ gcc/po/zh_TW.po | 3931 ++++++------ gcc/rust/ChangeLog | 4 + gcc/testsuite/ChangeLog | 1991 ++++++ .../c-c++-common/patchable_function_entry-decl.c | 3 +- .../patchable_function_entry-default.c | 3 +- .../patchable_function_entry-definition.c | 3 +- gcc/testsuite/c-c++-common/pr109884.c | 32 + gcc/testsuite/g++.dg/cpp0x/constexpr-mutable4.C | 15 + gcc/testsuite/g++.dg/cpp0x/constexpr-mutable5.C | 39 + gcc/testsuite/g++.dg/cpp0x/lambda/lambda-conv15.C | 11 + gcc/testsuite/g++.dg/cpp0x/noexcept78.C | 16 + gcc/testsuite/g++.dg/cpp0x/nsdmi-array2.C | 15 + gcc/testsuite/g++.dg/cpp0x/nsdmi-template26.C | 22 + gcc/testsuite/g++.dg/cpp1y/constexpr-mutable2.C | 20 + gcc/testsuite/g++.dg/cpp23/attr-assume11.C | 22 + gcc/testsuite/g++.dg/cpp23/ext-floating15.C | 1 + gcc/testsuite/g++.dg/cpp23/ext-floating2.C | 4 + gcc/testsuite/g++.dg/cpp23/feat-cxx2b.C | 6 + .../g++.dg/cpp2a/concepts-placeholder13.C | 18 + gcc/testsuite/g++.dg/cpp2a/desig27.C | 16 + gcc/testsuite/g++.dg/cpp2a/lambda-generic-ttp1.C | 11 + gcc/testsuite/g++.dg/cpp2a/lambda-generic-ttp2.C | 13 + gcc/testsuite/g++.dg/cpp2a/lambda-targ1.C | 11 + gcc/testsuite/g++.dg/cpp2a/nontype-class56.C | 8 + gcc/testsuite/g++.dg/ext/int128-8.C | 24 + gcc/testsuite/g++.dg/ext/unsigned-typedef2.C | 25 + gcc/testsuite/g++.dg/ext/unsigned-typedef3.C | 25 + gcc/testsuite/g++.dg/ext/visibility/anon8.C | 4 +- gcc/testsuite/g++.dg/init/pr109868.C | 13 + gcc/testsuite/g++.dg/pr109524.C | 2 +- gcc/testsuite/g++.dg/template/canon-type-20.C | 18 + gcc/testsuite/g++.dg/template/ttp36.C | 12 + gcc/testsuite/g++.dg/torture/pr106922.C | 9 + gcc/testsuite/g++.dg/torture/pr109724.C | 32 + gcc/testsuite/g++.dg/vect/pr109573.cc | 91 + gcc/testsuite/g++.dg/warn/Wdangling-reference13.C | 23 + gcc/testsuite/g++.target/aarch64/pr109661-1.C | 122 + gcc/testsuite/g++.target/aarch64/pr109661-2.C | 123 + gcc/testsuite/g++.target/aarch64/pr109661-3.C | 123 + gcc/testsuite/g++.target/aarch64/pr109661-4.C | 123 + gcc/testsuite/g++.target/i386/pr109676.C | 46 + gcc/testsuite/g++.target/riscv/rvv/base/pr109535.C | 144 + gcc/testsuite/gcc.c-torture/execute/pr109778.c | 26 + gcc/testsuite/gcc.dg/goacc/pr107041.c | 23 + gcc/testsuite/gcc.dg/lto/pr109778_0.c | 22 + gcc/testsuite/gcc.dg/lto/pr109778_1.c | 7 + gcc/testsuite/gcc.dg/pr109409.c | 10 + gcc/testsuite/gcc.dg/pr109412.c | 20 + gcc/testsuite/gcc.dg/pr109583.c | 25 + gcc/testsuite/gcc.dg/torture/pr109564-1.c | 74 + gcc/testsuite/gcc.dg/torture/pr109564-2.c | 33 + gcc/testsuite/gcc.dg/torture/pr109585.c | 33 + gcc/testsuite/gcc.dg/torture/pr109609.c | 26 + gcc/testsuite/gcc.dg/tree-ssa/evrp-ignore.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/vrp06.c | 2 +- gcc/testsuite/gcc.dg/vect/pr108950.c | 2 +- gcc/testsuite/gcc.target/aarch64/pr109661-1.c | 5 + gcc/testsuite/gcc.target/aarch64/sve/pr109505.c | 12 + gcc/testsuite/gcc.target/arm/mve/intrinsics/asrl.c | 21 +- gcc/testsuite/gcc.target/arm/mve/intrinsics/lsll.c | 33 +- .../gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c | 47 - .../intrinsics/mve_intrinsic_type_overloads-fp.c | 55 +- .../intrinsics/mve_intrinsic_type_overloads-int.c | 74 +- .../gcc.target/arm/mve/intrinsics/mve_vaddq_m.c | 48 - .../gcc.target/arm/mve/intrinsics/mve_vaddq_n.c | 31 - .../arm/mve/intrinsics/mve_vddupq_m_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vddupq_m_n_u32.c | 13 - .../arm/mve/intrinsics/mve_vddupq_m_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vddupq_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vddupq_n_u32.c | 13 - .../arm/mve/intrinsics/mve_vddupq_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vddupq_x_n_u16.c | 12 - .../arm/mve/intrinsics/mve_vddupq_x_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vddupq_x_n_u8.c | 12 - .../arm/mve/intrinsics/mve_vdwdupq_x_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vdwdupq_x_n_u32.c | 13 - .../arm/mve/intrinsics/mve_vdwdupq_x_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vidupq_m_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vidupq_m_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vidupq_m_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vidupq_n_u16.c | 13 - .../arm/mve/intrinsics/mve_vidupq_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vidupq_n_u8.c | 13 - .../arm/mve/intrinsics/mve_vidupq_x_n_u16.c | 12 - .../arm/mve/intrinsics/mve_vidupq_x_n_u32.c | 12 - .../arm/mve/intrinsics/mve_vidupq_x_n_u8.c | 12 - .../arm/mve/intrinsics/mve_viwdupq_x_n_u16.c | 13 - .../arm/mve/intrinsics/mve_viwdupq_x_n_u32.c | 13 - .../arm/mve/intrinsics/mve_viwdupq_x_n_u8.c | 13 - .../mve/intrinsics/mve_vldrdq_gather_offset_s64.c | 12 - .../mve/intrinsics/mve_vldrdq_gather_offset_u64.c | 12 - .../intrinsics/mve_vldrdq_gather_offset_z_s64.c | 12 - .../intrinsics/mve_vldrdq_gather_offset_z_u64.c | 12 - .../mve_vldrdq_gather_shifted_offset_s64.c | 12 - .../mve_vldrdq_gather_shifted_offset_u64.c | 12 - .../mve_vldrdq_gather_shifted_offset_z_s64.c | 12 - .../mve_vldrdq_gather_shifted_offset_z_u64.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_f16.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_s16.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_s32.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_u16.c | 12 - .../mve/intrinsics/mve_vldrhq_gather_offset_u32.c | 13 - .../intrinsics/mve_vldrhq_gather_offset_z_f16.c | 12 - .../intrinsics/mve_vldrhq_gather_offset_z_s16.c | 12 - .../intrinsics/mve_vldrhq_gather_offset_z_s32.c | 12 - .../intrinsics/mve_vldrhq_gather_offset_z_u16.c | 13 - .../intrinsics/mve_vldrhq_gather_offset_z_u32.c | 13 - .../mve_vldrhq_gather_shifted_offset_f16.c | 12 - .../mve_vldrhq_gather_shifted_offset_s16.c | 13 - .../mve_vldrhq_gather_shifted_offset_s32.c | 13 - .../mve_vldrhq_gather_shifted_offset_u16.c | 13 - .../mve_vldrhq_gather_shifted_offset_u32.c | 13 - .../mve_vldrhq_gather_shifted_offset_z_f16.c | 13 - .../mve_vldrhq_gather_shifted_offset_z_s16.c | 13 - .../mve_vldrhq_gather_shifted_offset_z_s32.c | 12 - .../mve_vldrhq_gather_shifted_offset_z_u16.c | 12 - .../mve_vldrhq_gather_shifted_offset_z_u32.c | 12 - .../mve/intrinsics/mve_vldrwq_gather_offset_f32.c | 12 - .../mve/intrinsics/mve_vldrwq_gather_offset_s32.c | 13 - .../mve/intrinsics/mve_vldrwq_gather_offset_u32.c | 13 - .../intrinsics/mve_vldrwq_gather_offset_z_f32.c | 12 - .../intrinsics/mve_vldrwq_gather_offset_z_s32.c | 13 - .../intrinsics/mve_vldrwq_gather_offset_z_u32.c | 13 - .../mve_vldrwq_gather_shifted_offset_f32.c | 12 - .../mve_vldrwq_gather_shifted_offset_s32.c | 13 - .../mve_vldrwq_gather_shifted_offset_u32.c | 13 - .../mve_vldrwq_gather_shifted_offset_z_f32.c | 12 - .../mve_vldrwq_gather_shifted_offset_z_s32.c | 13 - .../mve_vldrwq_gather_shifted_offset_z_u32.c | 13 - .../intrinsics/mve_vstore_scatter_shifted_offset.c | 141 - .../mve_vstore_scatter_shifted_offset_p.c | 142 - .../gcc.target/arm/mve/intrinsics/sqrshr.c | 21 +- .../gcc.target/arm/mve/intrinsics/sqrshrl_sat48.c | 21 +- .../gcc.target/arm/mve/intrinsics/sqshl.c | 21 +- .../gcc.target/arm/mve/intrinsics/sqshll.c | 21 +- .../gcc.target/arm/mve/intrinsics/srshr.c | 21 +- .../gcc.target/arm/mve/intrinsics/srshrl.c | 21 +- .../gcc.target/arm/mve/intrinsics/uqrshl.c | 33 +- .../gcc.target/arm/mve/intrinsics/uqrshll_sat48.c | 33 +- .../gcc.target/arm/mve/intrinsics/uqshl.c | 21 +- .../gcc.target/arm/mve/intrinsics/uqshll.c | 21 +- .../gcc.target/arm/mve/intrinsics/urshr.c | 35 +- .../gcc.target/arm/mve/intrinsics/urshrl.c | 33 +- .../gcc.target/arm/mve/intrinsics/vadciq_m_s32.c | 46 +- .../gcc.target/arm/mve/intrinsics/vadciq_m_u32.c | 46 +- .../gcc.target/arm/mve/intrinsics/vadciq_s32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vadciq_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vadcq_m_s32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vadcq_m_u32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vadcq_s32.c | 48 +- .../gcc.target/arm/mve/intrinsics/vadcq_u32.c | 48 +- .../arm/mve/intrinsics/vaddq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vaddq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vaddq_x_n_f16-1.c | 12 - .../arm/mve/intrinsics/vaddq_x_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vandq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vandq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vandq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vandq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_n_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_n_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_n_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_n_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_n_u32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_s8.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_u32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_u8.c | 23 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbicq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_m_n_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_n_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vbrsrq_x_n_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 2 +- .../arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vcmpeqq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpeqq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpeqq_n_u8.c | 2 +- .../arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vcmpgeq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpgeq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vcmpgtq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16.c | 4 +- .../arm/mve/intrinsics/vcmpgtq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmphiq_n_u8.c | 2 +- .../arm/mve/intrinsics/vcmpleq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vcmpleq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vcmpleq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpleq_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpleq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpleq_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpltq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vcmpltq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vcmpltq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpltq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpltq_n_f32.c | 2 +- .../arm/mve/intrinsics/vcmpneq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vcmpneq_m_n_f32-1.c | 12 - .../arm/mve/intrinsics/vcmpneq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_f16.c | 2 +- .../arm/mve/intrinsics/vcmpneq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vcmpneq_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vcmpneq_n_u8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vctp16q.c | 33 +- .../gcc.target/arm/mve/intrinsics/vctp16q_m.c | 42 +- .../gcc.target/arm/mve/intrinsics/vctp32q.c | 33 +- .../gcc.target/arm/mve/intrinsics/vctp32q_m.c | 42 +- .../gcc.target/arm/mve/intrinsics/vctp64q.c | 33 +- .../gcc.target/arm/mve/intrinsics/vctp64q_m.c | 42 +- .../gcc.target/arm/mve/intrinsics/vctp8q.c | 33 +- .../gcc.target/arm/mve/intrinsics/vctp8q_m.c | 42 +- .../arm/mve/intrinsics/vcvtaq_m_s16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtaq_m_s32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtaq_m_u16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtaq_m_u32_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vcvtaq_s16_f16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtaq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtaq_u16_f16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vcvtaq_u32_f32.c | 19 +- .../arm/mve/intrinsics/vcvtaq_x_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtaq_x_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtaq_x_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtaq_x_u32_f32.c | 22 +- .../gcc.target/arm/mve/intrinsics/vcvtbq_f16_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtbq_f32_f16.c | 17 +- .../arm/mve/intrinsics/vcvtbq_m_f16_f32.c | 26 +- .../arm/mve/intrinsics/vcvtbq_m_f32_f16.c | 26 +- .../arm/mve/intrinsics/vcvtbq_x_f32_f16.c | 22 +- .../arm/mve/intrinsics/vcvtmq_m_s16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtmq_m_s32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtmq_m_u16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtmq_m_u32_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vcvtmq_s16_f16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtmq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtmq_u16_f16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vcvtmq_u32_f32.c | 19 +- .../arm/mve/intrinsics/vcvtmq_x_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtmq_x_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtmq_x_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtmq_x_u32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtnq_m_s16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtnq_m_s32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtnq_m_u16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtnq_m_u32_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vcvtnq_s16_f16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtnq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtnq_u16_f16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vcvtnq_u32_f32.c | 17 +- .../arm/mve/intrinsics/vcvtnq_x_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtnq_x_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtnq_x_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtnq_x_u32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtpq_m_s16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtpq_m_s32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtpq_m_u16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtpq_m_u32_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vcvtpq_s16_f16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtpq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtpq_u16_f16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vcvtpq_u32_f32.c | 19 +- .../arm/mve/intrinsics/vcvtpq_x_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtpq_x_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtpq_x_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtpq_x_u32_f32.c | 22 +- .../gcc.target/arm/mve/intrinsics/vcvtq_f16_s16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vcvtq_f16_u16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vcvtq_f32_s32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vcvtq_f32_u32.c | 30 +- .../arm/mve/intrinsics/vcvtq_m_f16_s16.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_f16_u16.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_f32_s32.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_f32_u32.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_n_f16_s16.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_f16_u16.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_f32_s32.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_f32_u32.c | 38 +- .../arm/mve/intrinsics/vcvtq_m_n_s16_f16.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_s32_f32.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_u16_f16.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_n_u32_f32.c | 34 +- .../arm/mve/intrinsics/vcvtq_m_s16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_s32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_u16_f16.c | 33 +- .../arm/mve/intrinsics/vcvtq_m_u32_f32.c | 33 +- .../arm/mve/intrinsics/vcvtq_n_f16_s16.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_f16_u16.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_f32_s32.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_f32_u32.c | 24 +- .../arm/mve/intrinsics/vcvtq_n_s16_f16.c | 17 +- .../arm/mve/intrinsics/vcvtq_n_s32_f32.c | 17 +- .../arm/mve/intrinsics/vcvtq_n_u16_f16.c | 17 +- .../arm/mve/intrinsics/vcvtq_n_u32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_s16_f16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_s32_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvtq_u16_f16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vcvtq_u32_f32.c | 19 +- .../arm/mve/intrinsics/vcvtq_x_f16_s16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_f16_u16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_f32_s32.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_f32_u32.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f16_s16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f16_u16.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f32_s32.c | 34 +- .../arm/mve/intrinsics/vcvtq_x_n_f32_u32.c | 38 +- .../arm/mve/intrinsics/vcvtq_x_n_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_n_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_n_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_n_u32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_s16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_s32_f32.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_u16_f16.c | 22 +- .../arm/mve/intrinsics/vcvtq_x_u32_f32.c | 22 +- .../gcc.target/arm/mve/intrinsics/vcvttq_f16_f32.c | 17 +- .../gcc.target/arm/mve/intrinsics/vcvttq_f32_f16.c | 17 +- .../arm/mve/intrinsics/vcvttq_m_f16_f32.c | 26 +- .../arm/mve/intrinsics/vcvttq_m_f32_f16.c | 26 +- .../arm/mve/intrinsics/vcvttq_x_f32_f16.c | 22 +- .../gcc.target/arm/mve/intrinsics/veorq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/veorq_x_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/veorq_x_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vfmaq_f16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmaq_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmaq_m_f16.c | 42 +- .../gcc.target/arm/mve/intrinsics/vfmaq_m_f32.c | 42 +- .../arm/mve/intrinsics/vfmaq_m_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16.c | 58 +- .../arm/mve/intrinsics/vfmaq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_n_f16.c | 44 +- .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmaq_n_f32.c | 44 +- .../arm/mve/intrinsics/vfmasq_m_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16.c | 2 +- .../arm/mve/intrinsics/vfmasq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_n_f16.c | 44 +- .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vfmasq_n_f32.c | 44 +- .../gcc.target/arm/mve/intrinsics/vfmsq_f16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmsq_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vfmsq_m_f16.c | 42 +- .../gcc.target/arm/mve/intrinsics/vfmsq_m_f32.c | 42 +- .../arm/mve/intrinsics/vhcaddq_rot270_m_s16.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot270_m_s32.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot270_m_s8.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot270_s16.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot270_s32.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot270_s8.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot270_x_s16.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot270_x_s32.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot270_x_s8.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot90_m_s16.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot90_m_s32.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot90_m_s8.c | 34 +- .../arm/mve/intrinsics/vhcaddq_rot90_s16.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot90_s32.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot90_s8.c | 24 +- .../arm/mve/intrinsics/vhcaddq_rot90_x_s16.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot90_x_s32.c | 33 +- .../arm/mve/intrinsics/vhcaddq_rot90_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 29 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vld4q_f16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_f32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vld4q_u8.c | 37 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s16.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_s8.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u16.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u32.c | 28 +- .../arm/mve/intrinsics/vldrbq_gather_offset_u8.c | 28 +- .../mve/intrinsics/vldrbq_gather_offset_z_s16.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_s32.c | 36 +- .../arm/mve/intrinsics/vldrbq_gather_offset_z_s8.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_u16.c | 36 +- .../mve/intrinsics/vldrbq_gather_offset_z_u32.c | 36 +- .../arm/mve/intrinsics/vldrbq_gather_offset_z_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 25 +- .../arm/mve/intrinsics/vldrdq_gather_base_s64.c | 19 +- .../arm/mve/intrinsics/vldrdq_gather_base_u64.c | 19 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 24 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 24 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 31 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 31 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_s64.c | 23 +- .../arm/mve/intrinsics/vldrdq_gather_base_z_u64.c | 23 +- .../arm/mve/intrinsics/vldrdq_gather_offset_s64.c | 28 +- .../arm/mve/intrinsics/vldrdq_gather_offset_u64.c | 28 +- .../mve/intrinsics/vldrdq_gather_offset_z_s64.c | 36 +- .../mve/intrinsics/vldrdq_gather_offset_z_u64.c | 36 +- .../intrinsics/vldrdq_gather_shifted_offset_s64.c | 28 +- .../intrinsics/vldrdq_gather_shifted_offset_u64.c | 28 +- .../vldrdq_gather_shifted_offset_z_s64.c | 36 +- .../vldrdq_gather_shifted_offset_z_u64.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 20 +- .../arm/mve/intrinsics/vldrhq_gather_offset_f16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_s16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_u16.c | 28 +- .../arm/mve/intrinsics/vldrhq_gather_offset_u32.c | 28 +- .../mve/intrinsics/vldrhq_gather_offset_z_f16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_s16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_s32.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_u16.c | 36 +- .../mve/intrinsics/vldrhq_gather_offset_z_u32.c | 36 +- .../intrinsics/vldrhq_gather_shifted_offset_f16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_s16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_s32.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_u16.c | 28 +- .../intrinsics/vldrhq_gather_shifted_offset_u32.c | 28 +- .../vldrhq_gather_shifted_offset_z_f16.c | 36 +- .../vldrhq_gather_shifted_offset_z_s16.c | 36 +- .../vldrhq_gather_shifted_offset_z_s32.c | 36 +- .../vldrhq_gather_shifted_offset_z_u16.c | 36 +- .../vldrhq_gather_shifted_offset_z_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 25 +- .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 18 +- .../arm/mve/intrinsics/vldrwq_gather_base_f32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_s32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_u32.c | 19 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 22 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 22 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 22 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 28 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 28 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_f32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_s32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_base_z_u32.c | 23 +- .../arm/mve/intrinsics/vldrwq_gather_offset_f32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_offset_s32.c | 28 +- .../arm/mve/intrinsics/vldrwq_gather_offset_u32.c | 28 +- .../mve/intrinsics/vldrwq_gather_offset_z_f32.c | 36 +- .../mve/intrinsics/vldrwq_gather_offset_z_s32.c | 36 +- .../mve/intrinsics/vldrwq_gather_offset_z_u32.c | 36 +- .../intrinsics/vldrwq_gather_shifted_offset_f32.c | 28 +- .../intrinsics/vldrwq_gather_shifted_offset_s32.c | 28 +- .../intrinsics/vldrwq_gather_shifted_offset_u32.c | 28 +- .../vldrwq_gather_shifted_offset_z_f32.c | 36 +- .../vldrwq_gather_shifted_offset_z_s32.c | 36 +- .../vldrwq_gather_shifted_offset_z_u32.c | 36 +- .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 18 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 23 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 23 +- .../arm/mve/intrinsics/vmaxnmavq_f16-1.c | 12 - .../arm/mve/intrinsics/vmaxnmavq_f32-1.c | 12 - .../arm/mve/intrinsics/vmaxnmavq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vmaxnmavq_p_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c | 12 - .../arm/mve/intrinsics/vmaxnmvq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vmaxnmvq_p_f32-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_f16-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_f32-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vminnmavq_p_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c | 12 - .../arm/mve/intrinsics/vminnmvq_p_f16-1.c | 12 - .../arm/mve/intrinsics/vminnmvq_p_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmladavq_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_p_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavq_s8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavq_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavq_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavq_u8.c | 32 +- .../arm/mve/intrinsics/vmladavxq_p_s16.c | 40 +- .../arm/mve/intrinsics/vmladavxq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavxq_p_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmladavxq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavxq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmladavxq_s8.c | 32 +- .../arm/mve/intrinsics/vmlaldavaq_p_s16.c | 40 +- .../arm/mve/intrinsics/vmlaldavaq_p_s32.c | 40 +- .../arm/mve/intrinsics/vmlaldavaq_p_u16.c | 56 +- .../arm/mve/intrinsics/vmlaldavaq_p_u32.c | 56 +- .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaldavaq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u16.c | 44 +- .../gcc.target/arm/mve/intrinsics/vmlaldavaq_u32.c | 44 +- .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 2 +- .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 2 +- .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 2 +- .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 2 +- .../arm/mve/intrinsics/vmlaldavq_p_s16.c | 40 +- .../arm/mve/intrinsics/vmlaldavq_p_s32.c | 40 +- .../arm/mve/intrinsics/vmlaldavq_p_u16.c | 40 +- .../arm/mve/intrinsics/vmlaldavq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmlaldavq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaldavq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaldavq_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaldavq_u32.c | 32 +- .../arm/mve/intrinsics/vmlaldavxq_p_s16.c | 40 +- .../arm/mve/intrinsics/vmlaldavxq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaldavxq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s16.c | 42 +- .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s32.c | 42 +- .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_s8.c | 42 +- .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u16.c | 58 +- .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u32.c | 58 +- .../gcc.target/arm/mve/intrinsics/vmlaq_m_n_u8.c | 58 +- .../gcc.target/arm/mve/intrinsics/vmlaq_n_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaq_n_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaq_n_s8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlaq_n_u16.c | 44 +- .../gcc.target/arm/mve/intrinsics/vmlaq_n_u32.c | 44 +- .../gcc.target/arm/mve/intrinsics/vmlaq_n_u8.c | 44 +- .../arm/mve/intrinsics/vmlsdavaq_p_s16.c | 33 +- .../arm/mve/intrinsics/vmlsdavaq_p_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaq_p_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaq_s8.c | 24 +- .../arm/mve/intrinsics/vmlsdavaxq_p_s16.c | 33 +- .../arm/mve/intrinsics/vmlsdavaxq_p_s32.c | 33 +- .../arm/mve/intrinsics/vmlsdavaxq_p_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavaxq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsdavq_p_s8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsdavq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavq_s8.c | 24 +- .../arm/mve/intrinsics/vmlsdavxq_p_s16.c | 32 +- .../arm/mve/intrinsics/vmlsdavxq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsdavxq_p_s8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsdavxq_s8.c | 24 +- .../arm/mve/intrinsics/vmlsldavaq_p_s16.c | 32 +- .../arm/mve/intrinsics/vmlsldavaq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsldavaq_s32.c | 24 +- .../arm/mve/intrinsics/vmlsldavaxq_p_s16.c | 32 +- .../arm/mve/intrinsics/vmlsldavaxq_p_s32.c | 32 +- .../arm/mve/intrinsics/vmlsldavaxq_s16.c | 24 +- .../arm/mve/intrinsics/vmlsldavaxq_s32.c | 24 +- .../arm/mve/intrinsics/vmlsldavq_p_s16.c | 32 +- .../arm/mve/intrinsics/vmlsldavq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsldavq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsldavq_s32.c | 24 +- .../arm/mve/intrinsics/vmlsldavxq_p_s16.c | 32 +- .../arm/mve/intrinsics/vmlsldavxq_p_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmlsldavxq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovlbq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmovltq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovltq_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmovltq_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmovltq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovltq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovnbq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovntq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovntq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovntq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovntq_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmovntq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovntq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovntq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmovntq_u32.c | 24 +- .../arm/mve/intrinsics/vmulq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vmulq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c | 12 - .../arm/mve/intrinsics/vmulq_x_n_f16-1.c | 12 - .../arm/mve/intrinsics/vmulq_x_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_n_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmvnq_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vmvnq_n_s16.c | 17 +- .../gcc.target/arm/mve/intrinsics/vmvnq_n_s32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vmvnq_n_u16.c | 19 +- .../gcc.target/arm/mve/intrinsics/vmvnq_n_u32.c | 19 +- .../gcc.target/arm/mve/intrinsics/vmvnq_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vmvnq_x_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vornq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vornq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vornq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_f16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_f32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_f16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_f32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_n_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_n_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_n_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_n_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_s16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_s32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_u16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vorrq_n_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vorrq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vorrq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vpnot.c | 25 +- .../gcc.target/arm/mve/intrinsics/vpselq_f16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_f32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_s64.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_u64.c | 28 +- .../gcc.target/arm/mve/intrinsics/vpselq_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovnbq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovntq_u32.c | 24 +- .../arm/mve/intrinsics/vqmovunbq_m_s16.c | 33 +- .../arm/mve/intrinsics/vqmovunbq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovunbq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovunbq_s32.c | 24 +- .../arm/mve/intrinsics/vqmovuntq_m_s16.c | 33 +- .../arm/mve/intrinsics/vqmovuntq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqmovuntq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqmovuntq_s32.c | 24 +- .../arm/mve/intrinsics/vqrdmladhq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmladhq_m_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmladhq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmladhxq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlashq_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhq_m_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmlsdhxq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_n_s32.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_n_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_m_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_n_s16.c | 2 +- .../arm/mve/intrinsics/vqrdmulhq_n_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c | 2 +- .../arm/mve/intrinsics/vqrshlq_m_n_s16.c | 33 +- .../arm/mve/intrinsics/vqrshlq_m_n_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_n_s8.c | 33 +- .../arm/mve/intrinsics/vqrshlq_m_n_u16.c | 33 +- .../arm/mve/intrinsics/vqrshlq_m_n_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_n_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_n_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqrshlq_u8.c | 24 +- .../arm/mve/intrinsics/vqrshrnbq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqrshrnbq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqrshrnbq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vqrshrnbq_m_n_u32.c | 34 +- .../arm/mve/intrinsics/vqrshrnbq_n_s16.c | 24 +- .../arm/mve/intrinsics/vqrshrnbq_n_s32.c | 24 +- .../arm/mve/intrinsics/vqrshrnbq_n_u16.c | 24 +- .../arm/mve/intrinsics/vqrshrnbq_n_u32.c | 24 +- .../arm/mve/intrinsics/vqrshrntq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqrshrntq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqrshrntq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vqrshrntq_m_n_u32.c | 34 +- .../arm/mve/intrinsics/vqrshrntq_n_s16.c | 24 +- .../arm/mve/intrinsics/vqrshrntq_n_s32.c | 24 +- .../arm/mve/intrinsics/vqrshrntq_n_u16.c | 24 +- .../arm/mve/intrinsics/vqrshrntq_n_u32.c | 24 +- .../arm/mve/intrinsics/vqrshrunbq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqrshrunbq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqrshrunbq_n_s16.c | 24 +- .../arm/mve/intrinsics/vqrshrunbq_n_s32.c | 24 +- .../arm/mve/intrinsics/vqrshruntq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqrshruntq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqrshruntq_n_s16.c | 24 +- .../arm/mve/intrinsics/vqrshruntq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_n_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_r_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshlq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_n_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_r_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshlq_u8.c | 24 +- .../arm/mve/intrinsics/vqshluq_m_n_s16.c | 37 +- .../arm/mve/intrinsics/vqshluq_m_n_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vqshluq_m_n_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vqshluq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vqshluq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vqshluq_n_s8.c | 28 +- .../arm/mve/intrinsics/vqshrnbq_m_n_s16.c | 38 +- .../arm/mve/intrinsics/vqshrnbq_m_n_s32.c | 38 +- .../arm/mve/intrinsics/vqshrnbq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vqshrnbq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshrnbq_n_u32.c | 28 +- .../arm/mve/intrinsics/vqshrntq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqshrntq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqshrntq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vqshrntq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vqshrntq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshrntq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshrntq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqshrntq_n_u32.c | 24 +- .../arm/mve/intrinsics/vqshrunbq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqshrunbq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqshrunbq_n_s16.c | 24 +- .../arm/mve/intrinsics/vqshrunbq_n_s32.c | 24 +- .../arm/mve/intrinsics/vqshruntq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vqshruntq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vqshruntq_n_s16.c | 24 +- .../arm/mve/intrinsics/vqshruntq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_s16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_s32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_u16.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_u32.c | 2 +- .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 2 +- .../gcc.target/arm/mve/intrinsics/vrev16q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev16q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev16q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev16q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev16q_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev16q_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev32q_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev32q_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev64q_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrev64q_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev64q_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev64q_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrev64q_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrhaddq_x_u8.c | 33 +- .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 2 +- .../arm/mve/intrinsics/vrmlaldavhaxq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlaldavhaxq_s32.c | 24 +- .../arm/mve/intrinsics/vrmlaldavhq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlaldavhq_p_u32.c | 32 +- .../arm/mve/intrinsics/vrmlaldavhq_s32.c | 24 +- .../arm/mve/intrinsics/vrmlaldavhq_u32.c | 24 +- .../arm/mve/intrinsics/vrmlaldavhxq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlaldavhxq_s32.c | 24 +- .../arm/mve/intrinsics/vrmlsldavhaq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlsldavhaq_s32.c | 24 +- .../arm/mve/intrinsics/vrmlsldavhaxq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlsldavhaxq_s32.c | 24 +- .../arm/mve/intrinsics/vrmlsldavhq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlsldavhq_s32.c | 24 +- .../arm/mve/intrinsics/vrmlsldavhxq_p_s32.c | 32 +- .../arm/mve/intrinsics/vrmlsldavhxq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_m_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_m_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_x_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrmulhq_x_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndaq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndaq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndaq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndaq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndaq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndaq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndmq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndmq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndmq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndmq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndmq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndmq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndnq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndnq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndnq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndnq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndnq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndnq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndpq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndpq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndpq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndpq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndpq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndpq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndq_x_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndxq_f16.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndxq_f32.c | 30 +- .../gcc.target/arm/mve/intrinsics/vrndxq_m_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndxq_m_f32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndxq_x_f16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vrndxq_x_f32.c | 33 +- .../arm/mve/intrinsics/vrshrnbq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vrshrnbq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vrshrnbq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vrshrnbq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrnbq_n_u32.c | 24 +- .../arm/mve/intrinsics/vrshrntq_m_n_s16.c | 34 +- .../arm/mve/intrinsics/vrshrntq_m_n_s32.c | 34 +- .../arm/mve/intrinsics/vrshrntq_m_n_u16.c | 34 +- .../arm/mve/intrinsics/vrshrntq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vrshrntq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrntq_n_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrntq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrntq_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_m_n_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrshrq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrshrq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrshrq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrshrq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrshrq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vrshrq_x_n_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsbciq_m_s32.c | 46 +- .../gcc.target/arm/mve/intrinsics/vsbciq_m_u32.c | 46 +- .../gcc.target/arm/mve/intrinsics/vsbciq_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsbciq_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsbcq_m_s32.c | 62 +- .../gcc.target/arm/mve/intrinsics/vsbcq_m_u32.c | 63 +- .../gcc.target/arm/mve/intrinsics/vsbcq_s32.c | 48 +- .../gcc.target/arm/mve/intrinsics/vsbcq_u32.c | 48 +- .../arm/mve/intrinsics/vsetq_lane_f16-1.c | 13 - .../arm/mve/intrinsics/vsetq_lane_f32-1.c | 13 - .../gcc.target/arm/mve/intrinsics/vshlcq_m_s16.c | 42 +- .../gcc.target/arm/mve/intrinsics/vshlcq_m_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshlcq_m_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshlcq_m_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshlcq_m_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshlcq_m_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshlcq_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlcq_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlcq_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlcq_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlcq_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlcq_u8.c | 28 +- .../arm/mve/intrinsics/vshllbq_m_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshllbq_m_n_s8.c | 34 +- .../arm/mve/intrinsics/vshllbq_m_n_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshllbq_m_n_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshllbq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshllbq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshllbq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshllbq_n_u8.c | 24 +- .../arm/mve/intrinsics/vshllbq_x_n_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshllbq_x_n_s8.c | 40 +- .../arm/mve/intrinsics/vshllbq_x_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshllbq_x_n_u8.c | 40 +- .../arm/mve/intrinsics/vshlltq_m_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlltq_m_n_s8.c | 34 +- .../arm/mve/intrinsics/vshlltq_m_n_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlltq_m_n_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlltq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlltq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlltq_n_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlltq_n_u8.c | 24 +- .../arm/mve/intrinsics/vshlltq_x_n_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlltq_x_n_s8.c | 40 +- .../arm/mve/intrinsics/vshlltq_x_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlltq_x_n_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_n_s16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_n_s32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_n_s8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_n_u16.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_n_u32.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_n_u8.c | 34 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_r_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_r_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_r_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_r_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_r_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_r_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_s16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_s32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_s8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_u16.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_u32.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_m_u8.c | 33 +- .../gcc.target/arm/mve/intrinsics/vshlq_n_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlq_n_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshlq_n_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_n_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_r_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_r_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_r_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_r_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_r_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_r_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_s16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_s32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_s8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_u16.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_u32.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_u8.c | 24 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_n_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_n_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_n_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_n_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_n_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshlq_x_u8.c | 40 +- .../arm/mve/intrinsics/vshrnbq_m_n_s16.c | 38 +- .../arm/mve/intrinsics/vshrnbq_m_n_s32.c | 38 +- .../arm/mve/intrinsics/vshrnbq_m_n_u16.c | 38 +- .../arm/mve/intrinsics/vshrnbq_m_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrnbq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrnbq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrnbq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrnbq_n_u32.c | 28 +- .../arm/mve/intrinsics/vshrntq_m_n_s16.c | 38 +- .../arm/mve/intrinsics/vshrntq_m_n_s32.c | 38 +- .../arm/mve/intrinsics/vshrntq_m_n_u16.c | 38 +- .../arm/mve/intrinsics/vshrntq_m_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrntq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrntq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrntq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrntq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_m_n_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrq_m_n_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrq_m_n_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrq_m_n_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrq_m_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrq_m_n_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vshrq_x_n_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_s8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u16.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u32.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_m_n_u8.c | 38 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsliq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_m_n_u8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_s16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_s8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_u16.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vsriq_n_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vst1q_f16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_f16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_f32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_p_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vst1q_s16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vst1q_s8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_u16.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst1q_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vst1q_u8.c | 36 +- .../gcc.target/arm/mve/intrinsics/vst2q_f16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_f32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_s16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_s32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_s8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_u16.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_u32.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst2q_u8.c | 37 +- .../gcc.target/arm/mve/intrinsics/vst4q_f16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_f32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_s16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_s32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_s8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_u16.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_u32.c | 50 +- .../gcc.target/arm/mve/intrinsics/vst4q_u8.c | 50 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_s8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_p_u8.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrbq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_s32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_s8.c | 32 +- .../mve/intrinsics/vstrbq_scatter_offset_p_s16.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_s32.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_s8.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_u16.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_u32.c | 40 +- .../mve/intrinsics/vstrbq_scatter_offset_p_u8.c | 40 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_s16.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_s32.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_s8.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_u16.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_u32.c | 32 +- .../arm/mve/intrinsics/vstrbq_scatter_offset_u8.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrbq_u8.c | 32 +- .../arm/mve/intrinsics/vstrdq_scatter_base_p_s64.c | 40 +- .../arm/mve/intrinsics/vstrdq_scatter_base_p_u64.c | 40 +- .../arm/mve/intrinsics/vstrdq_scatter_base_s64.c | 32 +- .../arm/mve/intrinsics/vstrdq_scatter_base_u64.c | 32 +- .../mve/intrinsics/vstrdq_scatter_base_wb_p_s64.c | 40 +- .../mve/intrinsics/vstrdq_scatter_base_wb_p_u64.c | 40 +- .../mve/intrinsics/vstrdq_scatter_base_wb_s64.c | 32 +- .../mve/intrinsics/vstrdq_scatter_base_wb_u64.c | 32 +- .../mve/intrinsics/vstrdq_scatter_offset_p_s64.c | 40 +- .../mve/intrinsics/vstrdq_scatter_offset_p_u64.c | 40 +- .../arm/mve/intrinsics/vstrdq_scatter_offset_s64.c | 32 +- .../arm/mve/intrinsics/vstrdq_scatter_offset_u64.c | 32 +- .../vstrdq_scatter_shifted_offset_p_s64.c | 40 +- .../vstrdq_scatter_shifted_offset_p_u64.c | 40 +- .../intrinsics/vstrdq_scatter_shifted_offset_s64.c | 32 +- .../intrinsics/vstrdq_scatter_shifted_offset_u64.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_f16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrhq_s16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_s32.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_f16.c | 32 +- .../mve/intrinsics/vstrhq_scatter_offset_p_f16.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_s16.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_s32.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_u16.c | 40 +- .../mve/intrinsics/vstrhq_scatter_offset_p_u32.c | 40 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_s16.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_s32.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_u16.c | 32 +- .../arm/mve/intrinsics/vstrhq_scatter_offset_u32.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_f16.c | 32 +- .../vstrhq_scatter_shifted_offset_p_f16.c | 40 +- .../vstrhq_scatter_shifted_offset_p_s16.c | 40 +- .../vstrhq_scatter_shifted_offset_p_s32.c | 40 +- .../vstrhq_scatter_shifted_offset_p_u16.c | 40 +- .../vstrhq_scatter_shifted_offset_p_u32.c | 40 +- .../intrinsics/vstrhq_scatter_shifted_offset_s16.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_s32.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_u16.c | 32 +- .../intrinsics/vstrhq_scatter_shifted_offset_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_u16.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrhq_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrwq_f32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c | 40 +- .../gcc.target/arm/mve/intrinsics/vstrwq_s32.c | 32 +- .../arm/mve/intrinsics/vstrwq_scatter_base_f32.c | 28 +- .../arm/mve/intrinsics/vstrwq_scatter_base_p_f32.c | 36 +- .../arm/mve/intrinsics/vstrwq_scatter_base_p_s32.c | 36 +- .../arm/mve/intrinsics/vstrwq_scatter_base_p_u32.c | 36 +- .../arm/mve/intrinsics/vstrwq_scatter_base_s32.c | 28 +- .../arm/mve/intrinsics/vstrwq_scatter_base_u32.c | 28 +- .../mve/intrinsics/vstrwq_scatter_base_wb_f32.c | 32 +- .../mve/intrinsics/vstrwq_scatter_base_wb_p_f32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_base_wb_p_s32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_base_wb_p_u32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_base_wb_s32.c | 32 +- .../mve/intrinsics/vstrwq_scatter_base_wb_u32.c | 32 +- .../arm/mve/intrinsics/vstrwq_scatter_offset_f32.c | 32 +- .../mve/intrinsics/vstrwq_scatter_offset_p_f32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_offset_p_s32.c | 40 +- .../mve/intrinsics/vstrwq_scatter_offset_p_u32.c | 40 +- .../arm/mve/intrinsics/vstrwq_scatter_offset_s32.c | 32 +- .../arm/mve/intrinsics/vstrwq_scatter_offset_u32.c | 32 +- .../intrinsics/vstrwq_scatter_shifted_offset_f32.c | 32 +- .../vstrwq_scatter_shifted_offset_p_f32.c | 40 +- .../vstrwq_scatter_shifted_offset_p_s32.c | 40 +- .../vstrwq_scatter_shifted_offset_p_u32.c | 40 +- .../intrinsics/vstrwq_scatter_shifted_offset_s32.c | 32 +- .../intrinsics/vstrwq_scatter_shifted_offset_u32.c | 32 +- .../gcc.target/arm/mve/intrinsics/vstrwq_u32.c | 32 +- .../arm/mve/intrinsics/vsubq_m_n_f16-1.c | 12 - .../arm/mve/intrinsics/vsubq_m_n_f32-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c | 12 - .../gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c | 12 - .../arm/mve/intrinsics/vsubq_x_n_f16-1.c | 13 - .../arm/mve/intrinsics/vsubq_x_n_f32-1.c | 13 - .../gcc.target/arm/mve/mve_const_shifts.c | 41 + .../arm/mve/mve_vadcq_vsbcq_fpscr_overwrite.c | 67 + gcc/testsuite/gcc.target/arm/mve/pr108177-1.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-10.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-11.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-12.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-13-run.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-13.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-14-run.c | 2 +- gcc/testsuite/gcc.target/arm/mve/pr108177-14.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-2.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-3.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-4.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-5.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-6.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-7.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-8.c | 4 +- gcc/testsuite/gcc.target/arm/mve/pr108177-9.c | 4 +- gcc/testsuite/gcc.target/avr/torture/pr105753.c | 13 + gcc/testsuite/gcc.target/gcn/fpdiv.c | 1 - gcc/testsuite/gcc.target/powerpc/pr109069-1.c | 25 + gcc/testsuite/gcc.target/powerpc/pr109069-2-run.c | 50 + gcc/testsuite/gcc.target/powerpc/pr109069-2.c | 12 + gcc/testsuite/gcc.target/powerpc/pr109069-2.h | 83 + gcc/testsuite/gcc.target/powerpc/pr109566.c | 18 + gcc/testsuite/gcc.target/riscv/inline-atomics-1.c | 18 + gcc/testsuite/gcc.target/riscv/inline-atomics-2.c | 9 + gcc/testsuite/gcc.target/riscv/inline-atomics-3.c | 569 ++ gcc/testsuite/gcc.target/riscv/inline-atomics-4.c | 566 ++ gcc/testsuite/gcc.target/riscv/inline-atomics-5.c | 87 + gcc/testsuite/gcc.target/riscv/inline-atomics-6.c | 87 + gcc/testsuite/gcc.target/riscv/inline-atomics-7.c | 69 + gcc/testsuite/gcc.target/riscv/inline-atomics-8.c | 69 + gcc/testsuite/gcc.target/riscv/pr106602-rv32i.c | 14 + .../riscv/{pr106602.c => pr106602-rv64i.c} | 2 +- .../gcc.target/riscv/pr106602-rv64i_zba.c | 15 + gcc/testsuite/gcc.target/riscv/rvv/base/pr109535.c | 11 + gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 4 +- gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c | 2 +- .../gfortran.dg/goacc/attach-descriptor.f90 | 12 +- gcc/testsuite/gfortran.dg/goacc/pr109622-5.f90 | 44 + gcc/testsuite/gfortran.dg/goacc/pr109622-6.f90 | 8 + gcc/testsuite/gfortran.dg/overload_5.f90 | 118 + gcc/testsuite/gfortran.dg/ptr-func-5.f90 | 39 + gcc/testsuite/lib/target-supports.exp | 15 +- gcc/tree-ssa-alias.cc | 20 +- gcc/tree-ssa-ccp.cc | 6 +- gcc/tree-vect-loop.cc | 9 +- gcc/wide-int.h | 11 +- gnattools/ChangeLog | 10 + gnattools/configure | 56 +- gnattools/configure.ac | 56 +- gotools/ChangeLog | 4 + include/ChangeLog | 4 + intl/ChangeLog | 4 + libada/ChangeLog | 4 + libatomic/ChangeLog | 4 + libbacktrace/ChangeLog | 4 + libcc1/ChangeLog | 4 + libcody/ChangeLog | 4 + libcpp/ChangeLog | 4 + libcpp/po/ChangeLog | 8 + libcpp/po/ru.po | 72 +- libdecnumber/ChangeLog | 4 + libffi/ChangeLog | 12 + libffi/src/powerpc/ffi_linux64.c | 2 +- libgcc/ChangeLog | 33 + libgcc/config.host | 18 + libgcc/config/avr/libf7/ChangeLog | 4 + libgcc/config/darwin10-unwind-find-enc-func.c | 34 +- libgcc/config/libbid/ChangeLog | 4 + libgcc/config/riscv/atomic.c | 2 + libgcc/config/t-darwin | 10 +- libgcc/config/t-darwin-min-1 | 3 + libgcc/config/t-darwin-min-5 | 3 + libgcc/config/t-darwin-min-8 | 3 + libgcc/unwind-dw2-fde.c | 6 +- libgfortran/ChangeLog | 4 + libgm2/ChangeLog | 4 + libgo/go/syscall/libcall_linux.go | 8 + libgomp/ChangeLog | 40 + libgomp/testsuite/libgomp.c++/target-map-class-1.C | 98 + libgomp/testsuite/libgomp.c++/target-map-class-2.C | 6 + .../testsuite/libgomp.oacc-fortran/pr109622-2.f90 | 35 + .../testsuite/libgomp.oacc-fortran/pr109622-3.f90 | 35 + .../testsuite/libgomp.oacc-fortran/pr109622-4.f90 | 47 + .../testsuite/libgomp.oacc-fortran/pr109622.f90 | 35 + libiberty/ChangeLog | 4 + libitm/ChangeLog | 4 + libobjc/ChangeLog | 4 + libphobos/ChangeLog | 4 + libquadmath/ChangeLog | 4 + libsanitizer/ChangeLog | 12 + libsanitizer/configure.tgt | 2 +- libssp/ChangeLog | 4 + libstdc++-v3/ChangeLog | 377 ++ libstdc++-v3/acinclude.m4 | 2 +- .../post/aarch64-linux-gnu/baseline_symbols.txt | 2 + .../abi/post/i486-linux-gnu/baseline_symbols.txt | 2 + .../abi/post/m68k-linux-gnu/baseline_symbols.txt | 2 + .../post/powerpc64-linux-gnu/baseline_symbols.txt | 277 +- .../powerpc64le-linux-gnu/baseline_symbols.txt | 6654 ++++++++++++++++++++ .../post/riscv64-linux-gnu/baseline_symbols.txt | 2 + .../abi/post/s390x-linux-gnu/baseline_symbols.txt | 2 + .../post/x86_64-linux-gnu/32/baseline_symbols.txt | 2 + .../abi/post/x86_64-linux-gnu/baseline_symbols.txt | 2 + libstdc++-v3/config/abi/pre/gnu.ver | 9 +- libstdc++-v3/configure | 2 +- libstdc++-v3/configure.host | 3 + libstdc++-v3/doc/doxygen/user.cfg.in | 5 +- libstdc++-v3/doc/html/manual/abi.html | 6 +- libstdc++-v3/doc/xml/manual/abi.xml | 7 + libstdc++-v3/include/bits/basic_string.h | 51 +- libstdc++-v3/include/bits/basic_string.tcc | 8 +- libstdc++-v3/include/bits/cow_string.h | 2 + libstdc++-v3/include/bits/forward_list.h | 2 + libstdc++-v3/include/bits/fs_dir.h | 35 +- libstdc++-v3/include/bits/fs_path.h | 18 +- libstdc++-v3/include/bits/gslice_array.h | 2 + libstdc++-v3/include/bits/indirect_array.h | 2 + libstdc++-v3/include/bits/mask_array.h | 2 + libstdc++-v3/include/bits/max_size_type.h | 3 +- libstdc++-v3/include/bits/memory_resource.h | 12 + libstdc++-v3/include/bits/mofunc_impl.h | 3 +- libstdc++-v3/include/bits/move.h | 11 +- libstdc++-v3/include/bits/quoted_string.h | 12 +- libstdc++-v3/include/bits/random.h | 127 +- libstdc++-v3/include/bits/ranges_algo.h | 9 +- libstdc++-v3/include/bits/ranges_cmp.h | 4 + libstdc++-v3/include/bits/regex.tcc | 4 - libstdc++-v3/include/bits/slice_array.h | 2 + libstdc++-v3/include/bits/stl_bvector.h | 2 + libstdc++-v3/include/bits/stl_map.h | 2 + libstdc++-v3/include/bits/stl_multimap.h | 2 + libstdc++-v3/include/bits/stl_multiset.h | 3 +- libstdc++-v3/include/bits/stl_set.h | 2 + libstdc++-v3/include/bits/stl_vector.h | 2 + libstdc++-v3/include/bits/uniform_int_dist.h | 11 + libstdc++-v3/include/bits/unordered_map.h | 4 + libstdc++-v3/include/bits/unordered_set.h | 4 + libstdc++-v3/include/bits/uses_allocator.h | 5 + libstdc++-v3/include/c_global/cmath | 217 +- libstdc++-v3/include/experimental/memory_resource | 2 - libstdc++-v3/include/std/bit | 4 +- libstdc++-v3/include/std/expected | 4 +- libstdc++-v3/include/std/filesystem | 2 + libstdc++-v3/include/std/format | 4 +- libstdc++-v3/include/std/iomanip | 1 + libstdc++-v3/include/std/iostream | 2 + libstdc++-v3/include/std/memory_resource | 63 + libstdc++-v3/include/std/numbers | 2 +- libstdc++-v3/include/std/ranges | 10 +- libstdc++-v3/include/std/valarray | 2 + libstdc++-v3/include/std/version | 8 +- libstdc++-v3/src/c++17/floating_from_chars.cc | 7 + libstdc++-v3/src/c++17/floating_to_chars.cc | 17 + libstdc++-v3/src/c++98/ios_init.cc | 7 + libstdc++-v3/testsuite/20_util/from_chars/4.cc | 3 +- .../testsuite/20_util/to_chars/long_double.cc | 4 + .../testsuite/25_algorithms/fold_left/1.cc | 4 +- .../headers/cmath/constexpr_std_c++23.cc | 129 + .../testsuite/std/ranges/adaptors/as_const/1.cc | 37 +- .../testsuite/std/ranges/iota/max_size_type.cc | 12 +- .../testsuite/std/ranges/range_adaptor_closure.cc | 46 + libstdc++-v3/testsuite/std/ranges/version_c++23.cc | 18 +- libstdc++-v3/testsuite/util/testsuite_abi.cc | 3 +- libvtv/ChangeLog | 4 + lto-plugin/ChangeLog | 4 + maintainer-scripts/ChangeLog | 4 + zlib/ChangeLog | 4 + 1785 files changed, 91275 insertions(+), 49300 deletions(-) diff --cc gcc/fortran/trans-openmp.cc index d62e44897a8,71dccc57b12..aa8d5d63a7b --- a/gcc/fortran/trans-openmp.cc +++ b/gcc/fortran/trans-openmp.cc @@@ -5182,8 -3469,21 +5195,21 @@@ gfc_trans_omp_clauses (stmtblock_t *blo && (lastref->u.c.component->ts.type == BT_DERIVED || lastref->u.c.component->ts.type == BT_CLASS)) { - if (pointer || (openacc && allocatable)) + if (pointer || allocatable) { + /* If it's a bare attach/detach clause, we just want + to perform a single attach/detach operation, of the + pointer itself, not of the pointed-to object. */ + if (openacc + && (n->u.map_op == OMP_MAP_ATTACH + || n->u.map_op == OMP_MAP_DETACH)) + { + OMP_CLAUSE_DECL (node) + = build_fold_addr_expr (inner); + OMP_CLAUSE_SIZE (node) = size_zero_node; + goto finalize_map_clause; + } + tree data, size; if (lastref->u.c.component->ts.type == BT_CLASS)