From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1733) id 004533858C27; Tue, 23 May 2023 16:53:44 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 004533858C27 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1684860825; bh=hyn1mbDcz/mm6A9i4lEx7K/PHiXFfS0rXbYK6CEmt2s=; h=From:To:Subject:Date:From; b=wLsRwbFksWZVa+oet+hl6WHJSwVQrmuGW3dJPdr1u5Rm7lFRKO5UG1s7FxUvwO6yx nhAWPtqTKeocmFIYtV6v+w+3lfq2RLPTpSBijVxFLLqg2xalCvIZ6f8Q69p1uk/l2O su9/LJQmnp/6wJ9Z+NJOmpbYRDzVsj0zH6MygYtk= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Georg-Johann Lay To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-1138] Improve cost computation for single-bit bit insertions. X-Act-Checkin: gcc X-Git-Author: Georg-Johann Lay X-Git-Refname: refs/heads/master X-Git-Oldrev: f504b70eb0fc1339322960041a85606df4547897 X-Git-Newrev: 58b41bb4bafffec5e2e3425c8cee82b304bd0a5f Message-Id: <20230523165345.004533858C27@sourceware.org> Date: Tue, 23 May 2023 16:53:44 +0000 (GMT) List-Id: https://gcc.gnu.org/g:58b41bb4bafffec5e2e3425c8cee82b304bd0a5f commit r14-1138-g58b41bb4bafffec5e2e3425c8cee82b304bd0a5f Author: Georg-Johann Lay Date: Tue May 23 18:49:19 2023 +0200 Improve cost computation for single-bit bit insertions. Some miscomputation of rtx_costs lead to sub-optimal code for single-bit bit insertions. This patch implements TARGET_INSN_COST, which has a chance to see the whole insn during insn combination; in partictlar the SET_DEST of (set (zero_extract (...) ...)). gcc/ * config/avr/avr.cc (avr_insn_cost): New static function. (TARGET_INSN_COST): Define to that function. Diff: --- gcc/config/avr/avr.cc | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc index 9fa50ca230d..4fa6f5309b2 100644 --- a/gcc/config/avr/avr.cc +++ b/gcc/config/avr/avr.cc @@ -11514,6 +11514,52 @@ avr_rtx_costs (rtx x, machine_mode mode, int outer_code, } +/* Implement `TARGET_INSN_COST'. */ +/* For some insns, it is not enough to look at the cost of the SET_SRC. + In that case, have a look at the entire insn, e.g. during insn combine. */ + +static int +avr_insn_cost (rtx_insn *insn, bool speed) +{ + const int unknown_cost = -1; + int cost = unknown_cost; + + rtx set = single_set (insn); + + if (set + && ZERO_EXTRACT == GET_CODE (SET_DEST (set))) + { + // Try find anything that would flip the extracted bit. + bool not_bit_p = false; + + subrtx_iterator::array_type array; + FOR_EACH_SUBRTX (iter, array, SET_SRC (set), NONCONST) + { + enum rtx_code code = GET_CODE (*iter); + not_bit_p |= code == NOT || code == XOR || code == GE; + } + + // Don't go too deep into the analysis. In almost all cases, + // using BLD/BST is the best we can do for single-bit moves, + // even considering CSE. + cost = COSTS_N_INSNS (2 + not_bit_p); + } + + if (cost != unknown_cost) + { + if (avr_log.rtx_costs) + avr_edump ("\n%? (%s) insn_cost=%d\n%r\n", + speed ? "speed" : "size", cost, insn); + return cost; + } + + // Resort to what rtlanal.cc::insn_cost() implements as a default + // when targetm.insn_cost() is not implemented. + + return pattern_cost (PATTERN (insn), speed); +} + + /* Implement `TARGET_ADDRESS_COST'. */ static int @@ -14574,6 +14620,8 @@ avr_float_lib_compare_returns_bool (machine_mode mode, enum rtx_code) #undef TARGET_ASM_FINAL_POSTSCAN_INSN #define TARGET_ASM_FINAL_POSTSCAN_INSN avr_asm_final_postscan_insn +#undef TARGET_INSN_COST +#define TARGET_INSN_COST avr_insn_cost #undef TARGET_REGISTER_MOVE_COST #define TARGET_REGISTER_MOVE_COST avr_register_move_cost #undef TARGET_MEMORY_MOVE_COST