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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in riscv.md
@ 2023-05-30 13:57 Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-05-30 13:57 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:6b651d6bdecc399edc1cf783cf7fcfe590668a5e
commit 6b651d6bdecc399edc1cf783cf7fcfe590668a5e
Author: From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Tue May 30 10:16:09 2023 +0800
RISC-V: Fix warning in riscv.md
Notice there is warning:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md: In function ‘rtx_def*
gen_anddi3(rtx, rtx, rtx)’:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
Add unsigned conversion to fix this warning.
Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv.md: Fix signed and unsigned comparison
warning.
Diff:
---
gcc/config/riscv/riscv.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index aba203318a7..f545874edc1 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1353,9 +1353,9 @@
if (CONST_INT_P (operands[2]))
{
enum machine_mode tmode = VOIDmode;
- if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
+ if (UINTVAL (operands[2]) == GET_MODE_MASK (HImode))
tmode = HImode;
- else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
+ else if (UINTVAL (operands[2]) == GET_MODE_MASK (SImode))
tmode = SImode;
if (tmode != VOIDmode)
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in riscv.md
@ 2023-07-14 2:40 Jeff Law
0 siblings, 0 replies; 2+ messages in thread
From: Jeff Law @ 2023-07-14 2:40 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:2eea5ba1b0156a40793262ce3da62e23eb1b9219
commit 2eea5ba1b0156a40793262ce3da62e23eb1b9219
Author: From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Tue May 30 10:16:09 2023 +0800
RISC-V: Fix warning in riscv.md
Notice there is warning:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md: In function ‘rtx_def*
gen_anddi3(rtx, rtx, rtx)’:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: warning:
comparison between signed and unsigned integer expressions
[-Wsign-compare]
else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
Add unsigned conversion to fix this warning.
Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv.md: Fix signed and unsigned comparison
warning.
Diff:
---
gcc/config/riscv/riscv.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index aba203318a7..f545874edc1 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1353,9 +1353,9 @@
if (CONST_INT_P (operands[2]))
{
enum machine_mode tmode = VOIDmode;
- if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
+ if (UINTVAL (operands[2]) == GET_MODE_MASK (HImode))
tmode = HImode;
- else if (INTVAL (operands[2]) == GET_MODE_MASK (SImode))
+ else if (UINTVAL (operands[2]) == GET_MODE_MASK (SImode))
tmode = SImode;
if (tmode != VOIDmode)
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2023-07-14 2:40 UTC | newest]
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2023-05-30 13:57 [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix warning in riscv.md Jeff Law
2023-07-14 2:40 Jeff Law
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