From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1733) id B78F73858D3C; Fri, 2 Jun 2023 11:02:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org B78F73858D3C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1685703757; bh=zbGQ/sSQ/2A5HvUpYqklOaxP9bBnm8BVxmZ25ykiQ9o=; h=From:To:Subject:Date:From; b=D+t1f/EmTzG1CBZNyqKWaMtVsRfmKHQlg6IHQ28Z7/dEyWcqI0qFon7IApJREOHiJ lN1TR0pL5idS4uJv+1ixu9nOZGyrjnOpvkdpz/O1DxH5oHJyE0zEFJf6x6E1nj3jDi Xz5fW3clIwxZOTvSbXVtlljA2wZ/2Qq8t6QLq59o= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Georg-Johann Lay To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-9674] target/110088: Improve operation of l-reg with const after move from d-reg. X-Act-Checkin: gcc X-Git-Author: Georg-Johann Lay X-Git-Refname: refs/heads/releases/gcc-12 X-Git-Oldrev: 148e717a0cda31cdea59c2f8b61c16c8249b31a6 X-Git-Newrev: 6f8e64989c2418bb8a4050fc1f50039a7b9a0225 Message-Id: <20230602110237.B78F73858D3C@sourceware.org> Date: Fri, 2 Jun 2023 11:02:37 +0000 (GMT) List-Id: https://gcc.gnu.org/g:6f8e64989c2418bb8a4050fc1f50039a7b9a0225 commit r12-9674-g6f8e64989c2418bb8a4050fc1f50039a7b9a0225 Author: Georg-Johann Lay Date: Fri Jun 2 12:41:07 2023 +0200 target/110088: Improve operation of l-reg with const after move from d-reg. After reload, there may be sequences like lreg = dreg lreg = lreg const with an LD_REGS dreg, non-LD_REGS lreg, and in PLUS, IOR, AND. If dreg dies after the first insn, it is possible to use dreg = dreg const lreg = dreg instead which is more efficient. gcc/ PR target/110088 * config/avr/avr.md: Add an RTL peephole to optimize operations on non-LD_REGS after a move from LD_REGS. (piaop): New code iterator. Diff: --- gcc/config/avr/avr.md | 41 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 4b994296554..6858dbab4ab 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -279,6 +279,7 @@ (define_code_iterator any_extract [sign_extract zero_extract]) (define_code_iterator any_shiftrt [lshiftrt ashiftrt]) +(define_code_iterator piaop [plus ior and]) (define_code_iterator bitop [xor ior and]) (define_code_iterator xior [xor ior]) (define_code_iterator eqne [eq ne]) @@ -4714,7 +4715,8 @@ [(parallel [(set (match_operand:HISI 0 "register_operand") (bitop:HISI (match_dup 0) (match_operand:HISI 1 "register_operand"))) - (clobber (scratch:QI))])] + (clobber (scratch:QI)) + (clobber (reg:CC REG_CC))])] "optimize && reload_completed" [(const_int 1)] @@ -4728,6 +4730,43 @@ DONE; }) +;; If $0 = $0 const requires a QI scratch, and d-reg $1 dies after +;; the first insn, then we can replace +;; $0 = $1 +;; $0 = $0 const +;; by +;; $1 = $1 const +;; $0 = $1 +;; This transorms constraint alternative "r,0,n,&d" of the first operation +;; to alternative "d,0,n,X". +;; "*addhi3_clobber" "*addpsi3" "*addsi3" +;; "*addhq3" "*adduhq3" "*addha3" "*adduha3" +;; "*addsq3" "*addusq3" "*addsa3" "*addusa3" +;; "*iorhi3" "*iorpsi3" "*iorsi3" +;; "*andhi3" "*andpsi3" "*andsi3" +(define_peephole2 + [(parallel [(set (match_operand:ORDERED234 0 "register_operand") + (match_operand:ORDERED234 1 "d_register_operand")) + (clobber (reg:CC REG_CC))]) + (parallel [(set (match_dup 0) + (piaop:ORDERED234 (match_dup 0) + (match_operand:ORDERED234 2 "const_operand"))) + ; A d-reg as scratch tells that this insn is expensive, and + ; that $0 is not a d-register: l-reg or something like SI:14 etc. + (clobber (match_operand:QI 3 "d_register_operand")) + (clobber (reg:CC REG_CC))])] + "peep2_reg_dead_p (1, operands[1])" + [(parallel [(set (match_dup 1) + (piaop:ORDERED234 (match_dup 1) + (match_dup 2))) + (clobber (scratch:QI)) + (clobber (reg:CC REG_CC))]) + ; Unfortunately, the following insn misses a REG_DEAD note for $1, + ; so this peep2 works only once. + (parallel [(set (match_dup 0) + (match_dup 1)) + (clobber (reg:CC REG_CC))])]) + ;; swap swap swap swap swap swap swap swap swap swap swap swap swap swap swap ;; swap