From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1314) id 9175F3858288; Wed, 7 Jun 2023 03:03:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9175F3858288 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1686107022; bh=Ye88HBBGTPC9i3ZMJopDum+tqnCNLaQDs5eMLxqebm4=; h=From:To:Subject:Date:From; b=m2/FFWjQlbS2+cVDs0hOafbTdKAjKU0E+CqxJrTrcMjz7Q638EsA7BAs+DFDkaMX7 YFPEFOuXgTJI+Q5TorvvE5tBy5eYsoKxZKKmlEA+2amg/SiunojszES5KH9SWugJRg 0ucFCU2CPwGKi8whmvLgTehdi/Ys383zbzxg+/Gs= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Andrew Pinski To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-1600] Improve do_store_flag for single bit when there is no non-zero bits X-Act-Checkin: gcc X-Git-Author: Andrew Pinski X-Git-Refname: refs/heads/trunk X-Git-Oldrev: cc155ff9c38848a8e6a7125dd0b66ac0aef47880 X-Git-Newrev: e60593f3881c72a96a3fa4844d73e8a2cd14f670 Message-Id: <20230607030342.9175F3858288@sourceware.org> Date: Wed, 7 Jun 2023 03:03:42 +0000 (GMT) List-Id: https://gcc.gnu.org/g:e60593f3881c72a96a3fa4844d73e8a2cd14f670 commit r14-1600-ge60593f3881c72a96a3fa4844d73e8a2cd14f670 Author: Andrew Pinski Date: Sun Jun 4 19:21:05 2023 -0700 Improve do_store_flag for single bit when there is no non-zero bits In r14-1534-g908e5ab5c11c, I forgot you could turn off CCP or turn off the bit tracking part of CCP so we would lose out what TER was able to do before hand. This moves around the TER code so that it is used instead of just the nonzerobits. It also makes it easier to remove the TER part of the code later on too. OK? Bootstrapped and tested on x86_64-linux-gnu. Note it reintroduces PR 110117 (which was accidently fixed after r14-1534-g908e5ab5c11c). The next patch in series will fix that. gcc/ChangeLog: * expr.cc (do_store_flag): Rearrange the TER code so that it overrides the nonzero bits info if we had `a & POW2`. Diff: --- gcc/expr.cc | 28 +++++++++++----------------- 1 file changed, 11 insertions(+), 17 deletions(-) diff --git a/gcc/expr.cc b/gcc/expr.cc index 4efb9912c9f..1c5874b0dd0 100644 --- a/gcc/expr.cc +++ b/gcc/expr.cc @@ -13158,38 +13158,32 @@ do_store_flag (sepops ops, rtx target, machine_mode mode) && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type))) { wide_int nz = tree_nonzero_bits (arg0); + gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR); + /* If the defining statement was (x & POW2), then use that instead of + the non-zero bits. */ + if (srcstmt && integer_pow2p (gimple_assign_rhs2 (srcstmt))) + { + nz = wi::to_wide (gimple_assign_rhs2 (srcstmt)); + arg0 = gimple_assign_rhs1 (srcstmt); + } if (wi::popcount (nz) == 1 && (integer_zerop (arg1) || wi::to_wide (arg1) == nz)) { - tree op0; - int bitnum; - gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR); - /* If the defining statement was (x & POW2), then remove the and - as we are going to add it back. */ - if (srcstmt - && integer_pow2p (gimple_assign_rhs2 (srcstmt))) - { - op0 = gimple_assign_rhs1 (srcstmt); - bitnum = tree_log2 (gimple_assign_rhs2 (srcstmt)); - } - else - { - op0 = arg0; - bitnum = wi::exact_log2 (nz); - } + int bitnum = wi::exact_log2 (nz); enum tree_code tcode = EQ_EXPR; if ((code == NE) ^ !integer_zerop (arg1)) tcode = NE_EXPR; type = lang_hooks.types.type_for_mode (mode, unsignedp); return expand_single_bit_test (loc, tcode, - op0, + arg0, bitnum, type, target, mode); } } + if (! get_subtarget (target) || GET_MODE (subtarget) != operand_mode) subtarget = 0;