From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7810) id 70ADA3857701; Wed, 7 Jun 2023 16:45:54 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 70ADA3857701 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1686156354; bh=NrQyoR27ZSw/6+LoKGstMcsLfdkKpwkqWKnMYpofeXc=; h=From:To:Subject:Date:From; b=kDqH2ieA155TwI6yHgHhoV5NIg8DmbhrG92gbf+/nv3PfwFBY5HopBVfeT9lJFJ6y 4rIKBr+We7E0QL9B+D3G6uUhTVEno2zZgMHxJ/I41h01+6U181H7OPfoeVzQe/uEvw f4xnYpbnwh9mUGuHaZCR4bu4JQtQf3M0108G78F8= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Alex Coplan To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-1616] aarch64: Fix wrong code with st64b builtin [PR110100] X-Act-Checkin: gcc X-Git-Author: Alex Coplan X-Git-Refname: refs/heads/master X-Git-Oldrev: 713613541254039a34e1dd8fd4a613a299af1fd6 X-Git-Newrev: 737a0b749a7bc3e7cb904ea2d4b18dc130514b85 Message-Id: <20230607164554.70ADA3857701@sourceware.org> Date: Wed, 7 Jun 2023 16:45:54 +0000 (GMT) List-Id: https://gcc.gnu.org/g:737a0b749a7bc3e7cb904ea2d4b18dc130514b85 commit r14-1616-g737a0b749a7bc3e7cb904ea2d4b18dc130514b85 Author: Alex Coplan Date: Tue Jun 6 11:52:19 2023 +0100 aarch64: Fix wrong code with st64b builtin [PR110100] The st64b pattern incorrectly had an output constraint on the register operand containing the destination address for the store, leading to wrong code. This patch fixes that. gcc/ChangeLog: PR target/110100 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64): Use input operand for the destination address. * config/aarch64/aarch64.md (st64b): Fix constraint on address operand. gcc/testsuite/ChangeLog: PR target/110100 * gcc.target/aarch64/acle/pr110100.c: New test. Diff: --- gcc/config/aarch64/aarch64-builtins.cc | 2 +- gcc/config/aarch64/aarch64.md | 2 +- gcc/testsuite/gcc.target/aarch64/acle/pr110100.c | 7 +++++++ 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index d48109139e3..1a4507f32e6 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -2519,7 +2519,7 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx target) { rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1)); - create_output_operand (&ops[0], op0, DImode); + create_input_operand (&ops[0], op0, DImode); create_input_operand (&ops[1], op1, V8DImode); expand_insn (CODE_FOR_st64b, 2, ops); return const0_rtx; diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 11d0d9c8eb6..ac39a4d683e 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -7928,7 +7928,7 @@ ) (define_insn "st64b" - [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r")) + [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r")) (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")] UNSPEC_ST64B) )] diff --git a/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c b/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c new file mode 100644 index 00000000000..f56d5e619e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-march=armv8.7-a -O2" } */ +#include +void do_st64b(data512_t data) { + __arm_st64b((void*)0x10000000, data); +} +/* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */