From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 1005) id 5D61D3858D38; Tue, 13 Jun 2023 18:00:18 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 5D61D3858D38 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1686679218; bh=HS09dRdk25thFw1QWvDs813VT/UUDtwPjt7CrKrHZmQ=; h=From:To:Subject:Date:From; b=cOVJZhxW5WRprIXEOyno481rgbNkLVdhFIO3yX2AnA783eXYP2n1jWVayl9cwjMvq UY2/ABgRc1orFBNrIifYxEf70v4d/2pVYfGLDFdhPO0+mWQjYon+FM7at3sfBHRUPu Bzwo9vIigBEzWfos264lLHRkx1PtneuLJiUCX16Q= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Michael Meissner To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/meissner/heads/work122)] Revert patches X-Act-Checkin: gcc X-Git-Author: Michael Meissner X-Git-Refname: refs/users/meissner/heads/work122 X-Git-Oldrev: 6b3659d8b2093c33897ff3e4c5a9ef538e96c007 X-Git-Newrev: e5efbdc991534f471b5de41559764bb98922f9b5 Message-Id: <20230613180018.5D61D3858D38@sourceware.org> Date: Tue, 13 Jun 2023 18:00:18 +0000 (GMT) List-Id: https://gcc.gnu.org/g:e5efbdc991534f471b5de41559764bb98922f9b5 commit e5efbdc991534f471b5de41559764bb98922f9b5 Author: Michael Meissner Date: Tue Jun 13 14:00:14 2023 -0400 Revert patches Diff: --- gcc/config/rs6000/fusion.md | 23 ++++++-------- gcc/config/rs6000/genfusion.pl | 37 +++------------------- gcc/config/rs6000/predicates.md | 14 ++++++++ gcc/config/rs6000/rs6000.md | 4 +-- gcc/testsuite/g++.target/powerpc/pr105325.C | 26 --------------- .../gcc.target/powerpc/fusion-p10-ldcmpi.c | 14 ++++---- 6 files changed, 37 insertions(+), 81 deletions(-) diff --git a/gcc/config/rs6000/fusion.md b/gcc/config/rs6000/fusion.md index 9eefae22a1a..d45fb138a70 100644 --- a/gcc/config/rs6000/fusion.md +++ b/gcc/config/rs6000/fusion.md @@ -22,7 +22,7 @@ ;; load mode is DI result mode is clobber compare mode is CC extend is none (define_insn_and_split "*ld_cmpdi_cr0_DI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ") + (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -43,7 +43,7 @@ ;; load mode is DI result mode is clobber compare mode is CCUNS extend is none (define_insn_and_split "*ld_cmpldi_cr0_DI_clobber_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") - (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ") + (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_0_to_1_operand" "n"))) (clobber (match_scratch:DI 0 "=r"))] "(TARGET_P10_FUSION)" @@ -64,7 +64,7 @@ ;; load mode is DI result mode is DI compare mode is CC extend is none (define_insn_and_split "*ld_cmpdi_cr0_DI_DI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:DI 1 "non_update_memory_operand" "YZ") + (compare:CC (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -85,7 +85,7 @@ ;; load mode is DI result mode is DI compare mode is CCUNS extend is none (define_insn_and_split "*ld_cmpldi_cr0_DI_DI_CCUNS_none" [(set (match_operand:CCUNS 2 "cc_reg_operand" "=x") - (compare:CCUNS (match_operand:DI 1 "non_update_memory_operand" "YZ") + (compare:CCUNS (match_operand:DI 1 "ds_form_mem_operand" "m") (match_operand:DI 3 "const_0_to_1_operand" "n"))) (set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -106,22 +106,21 @@ ;; load mode is SI result mode is clobber compare mode is CC extend is none (define_insn_and_split "*lwa_cmpdi_cr0_SI_clobber_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ") + (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) - (clobber (match_scratch:DI 0 "=r"))] + (clobber (match_scratch:SI 0 "=r"))] "(TARGET_P10_FUSION)" "lwa%X1 %0,%1\;cmpdi %2,%0,%3" "&& reload_completed && (cc_reg_not_cr0_operand (operands[2], CCmode) || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), SImode, NON_PREFIXED_DS))" - [(set (match_dup 0) (sign_extend:DI (match_dup 1))) + [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -149,7 +148,7 @@ ;; load mode is SI result mode is SI compare mode is CC extend is none (define_insn_and_split "*lwa_cmpdi_cr0_SI_SI_CC_none" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ") + (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_dup 1))] "(TARGET_P10_FUSION)" @@ -158,13 +157,12 @@ && (cc_reg_not_cr0_operand (operands[2], CCmode) || !address_is_non_pfx_d_or_x (XEXP (operands[1], 0), SImode, NON_PREFIXED_DS))" - [(set (match_dup 0) (sign_extend:DI (match_dup 1))) + [(set (match_dup 0) (match_dup 1)) (set (match_dup 2) (compare:CC (match_dup 0) (match_dup 3)))] "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 @@ -192,7 +190,7 @@ ;; load mode is SI result mode is EXTSI compare mode is CC extend is sign (define_insn_and_split "*lwa_cmpdi_cr0_SI_EXTSI_CC_sign" [(set (match_operand:CC 2 "cc_reg_operand" "=x") - (compare:CC (match_operand:SI 1 "non_update_memory_operand" "YZ") + (compare:CC (match_operand:SI 1 "ds_form_mem_operand" "m") (match_operand:SI 3 "const_m1_to_1_operand" "n"))) (set (match_operand:EXTSI 0 "gpc_reg_operand" "=r") (sign_extend:EXTSI (match_dup 1)))] "(TARGET_P10_FUSION)" @@ -207,7 +205,6 @@ "" [(set_attr "type" "fused_load_cmpi") (set_attr "cost" "8") - (set_attr "sign_extend" "yes") (set_attr "length" "8")]) ;; load-cmpi fusion pattern generated by gen_ld_cmpi_p10 diff --git a/gcc/config/rs6000/genfusion.pl b/gcc/config/rs6000/genfusion.pl index 31ee54aea93..82e8f863b02 100755 --- a/gcc/config/rs6000/genfusion.pl +++ b/gcc/config/rs6000/genfusion.pl @@ -61,23 +61,15 @@ sub gen_ld_cmpi_p10_one my $mempred = "non_update_memory_operand"; my $extend; - # We need to special case lwa. The prefixed_load_p function in rs6000.cc - # (which determines if a load instruction is prefixed) uses the fact that the - # register mode is different from the memory mode, and that the sign_extend - # attribute is set to use DS-form rules for the address instead of D-form. - # If the register size is the same, prefixed_load_p assumes we are doing a - # lwz. - my $lwa_insn = ($lmode eq "SI" && $ccmode eq "CC"); - if ($ccmode eq "CC") { # ld and lwa are both DS-FORM. ($lmode =~ /^[SD]I$/) and $np = "NON_PREFIXED_DS"; -# ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand"; + ($lmode =~ /^[SD]I$/) and $mempred = "ds_form_mem_operand"; } else { if ($lmode eq "DI") { # ld is DS-form, but lwz is not. $np = "NON_PREFIXED_DS"; - # $mempred = "ds_form_mem_operand"; + $mempred = "ds_form_mem_operand"; } } @@ -89,9 +81,7 @@ sub gen_ld_cmpi_p10_one # For clobber, we need a SI/DI reg in case we # split because we have to sign/zero extend. - my $clobbermode = (($lmode =~ /^[QH]I$/) - ? "GPR" - : ($lwa_insn ? "DI" : $lmode)); + my $clobbermode = ($lmode =~ /^[QH]I$/) ? "GPR" : $lmode; if ($result =~ /^EXT/ || $result eq "GPR" || $clobbermode eq "GPR") { # We always need extension if result > lmode. $extend = ($ccmode eq "CC") ? "sign" : "zero"; @@ -101,15 +91,12 @@ sub gen_ld_cmpi_p10_one } my $ldst = mode_to_ldst_char($lmode); - - # DS-form addresses need YZ, and not m. - my $constraint = ($np eq "NON_PREFIXED_DS") ? "YZ" : "m"; print <