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From: Jeff Law <law@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-1910] Fix arc assumption that insns are not re-recognized Date: Sun, 18 Jun 2023 17:28:10 +0000 (GMT) [thread overview] Message-ID: <20230618172810.898E03858D28@sourceware.org> (raw) https://gcc.gnu.org/g:0f9bb3e7a4aab95fd449f60b5f891ed9a6e5f352 commit r14-1910-g0f9bb3e7a4aab95fd449f60b5f891ed9a6e5f352 Author: Jeff Law <jlaw@ventanamicro.com> Date: Sun Jun 18 11:25:12 2023 -0600 Fix arc assumption that insns are not re-recognized Testing the V2 version of Manolis's fold-mem-offsets patch exposed a minor bug in the arc backend. The movsf_insn pattern has constraints which allow storing certain constants to memory. reload/lra will target those alternatives under the right circumstances. However the insn's condition requires that one of the two operands must be a register. Thus if a pass were to force re-recognition of the pattern we can get an unrecognized insn failure. This patch adjusts the conditions to more closely match movsi_insn. More specifically it allows storing a constant into a limited set of memory operands (as defined by the Usc constraint). movqi_insn has the same core problem and gets the same solution. Committed after the tester validated there are not regresisons gcc/ * config/arc/arc.md (movqi_insn): Allow certain constants to be stored into memory in the pattern's condition. (movsf_insn): Similarly. Diff: --- gcc/config/arc/arc.md | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index c51ce173350..1f122d9507f 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -705,6 +705,9 @@ archs4x, archs4xd" (match_operand:QI 1 "move_src_operand" "rL,rP,q,P,hCm1,cL, I,?Rac,i,?i,T,q,Usd,Ucm,m,?Rac,c,?Rac,Cm3,i"))] "register_operand (operands[0], QImode) || register_operand (operands[1], QImode) + || (CONSTANT_P (operands[1]) + && (!satisfies_constraint_I (operands[1]) || !optimize_size) + && satisfies_constraint_Usc (operands[0])) || (satisfies_constraint_Cm3 (operands[1]) && memory_operand (operands[0], QImode))" "@ @@ -1363,7 +1366,10 @@ archs4x, archs4xd" [(set (match_operand:SF 0 "move_dest_operand" "=h,h, r,r, q,S,Usc,r,m") (match_operand:SF 1 "move_src_operand" "hCfZ,E,rCfZ,E,Uts,q, E,m,r"))] "register_operand (operands[0], SFmode) - || register_operand (operands[1], SFmode)" + || register_operand (operands[1], SFmode) + || (CONSTANT_P (operands[1]) + && (!satisfies_constraint_I (operands[1]) || !optimize_size) + && satisfies_constraint_Usc (operands[0]))" "@ mov%?\\t%0,%1 mov%?\\t%0,%1 ; %A1
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