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From: Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r14-1922] avr: Fix ICE on optimize attribute.
Date: Mon, 19 Jun 2023 06:32:54 +0000 (GMT)	[thread overview]
Message-ID: <20230619063254.BC6963858D33@sourceware.org> (raw)

https://gcc.gnu.org/g:53953b6f31f18ac2e2241f0c1f3c8d7ecec78e7f

commit r14-1922-g53953b6f31f18ac2e2241f0c1f3c8d7ecec78e7f
Author: Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
Date:   Mon Jun 19 11:59:12 2023 +0530

    avr: Fix ICE on optimize attribute.
    
    This commit fixes an ICE when an optimize attribute changes the prevailing
    optimization level.
    
    https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105069 describes the
    same ICE for the sh target, where the fix was to enable save/restore of
    target specific options modified via TARGET_OPTIMIZATION_TABLE hook.
    
    For the AVR target, mgas-isr-prologues and -mmain-is-OS_task are those
    target specific options. As they enable generation of more optimal code,
    this commit adds the Optimization option property to those option records,
    and that fixes the ICE.
    
    Regression run shows no regressions, and >100 new PASSes.
    
            PR target/110086
    
    gcc/ChangeLog:
    
            * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
            Add Optimization option property.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/avr/pr110086.c: New test.

Diff:
---
 gcc/config/avr/avr.opt                  | 4 ++--
 gcc/testsuite/gcc.target/avr/pr110086.c | 5 +++++
 2 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/gcc/config/avr/avr.opt b/gcc/config/avr/avr.opt
index f62d7467eb7..5a0b46539aa 100644
--- a/gcc/config/avr/avr.opt
+++ b/gcc/config/avr/avr.opt
@@ -27,7 +27,7 @@ Target RejectNegative Joined Var(avr_mmcu) MissingArgError(missing device or arc
 -mmcu=MCU	Select the target MCU.
 
 mgas-isr-prologues
-Target Var(avr_gasisr_prologues) UInteger Init(0)
+Target Var(avr_gasisr_prologues) UInteger Init(0) Optimization 
 Allow usage of __gcc_isr pseudo instructions in ISR prologues and epilogues.
 
 mn-flash=
@@ -65,7 +65,7 @@ Target Joined RejectNegative UInteger Var(avr_branch_cost) Init(0)
 Set the branch costs for conditional branch instructions.  Reasonable values are small, non-negative integers.  The default branch cost is 0.
 
 mmain-is-OS_task
-Target Mask(MAIN_IS_OS_TASK)
+Target Mask(MAIN_IS_OS_TASK) Optimization
 Treat main as if it had attribute OS_task.
 
 morder1
diff --git a/gcc/testsuite/gcc.target/avr/pr110086.c b/gcc/testsuite/gcc.target/avr/pr110086.c
new file mode 100644
index 00000000000..6b97620d980
--- /dev/null
+++ b/gcc/testsuite/gcc.target/avr/pr110086.c
@@ -0,0 +1,5 @@
+/* { dg-do compile } */
+/* { dg-options "-Os" } */
+
+void __attribute__((optimize("O0"))) foo() {
+}

                 reply	other threads:[~2023-06-19  6:32 UTC|newest]

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