From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2063) id 0F6713858401; Tue, 20 Jun 2023 03:20:52 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 0F6713858401 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1687231252; bh=MXtyUBbxxhorUxNlyVVb+coPav41EeRw+1vXsaiQzns=; h=From:To:Subject:Date:From; b=bnHvjMHDtDW7Pb2pkBUrQzOwNh2dOXSxmoCemfWPW00JuxM3pLnBDJgLU6K5EdL8h 6k0QQJ2gjrEdMJoAsqZ8jR7bLXKM0hwBGBy8FSOrmC8uNdVI0wnXN8/jX0tKoZUc/q eKwmlsRSHf871Pgdtd+jY550W795GEePCF/AV4bE= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kewen Lin To: gcc-cvs@gcc.gnu.org Subject: [gcc r12-9713] rs6000: Guard __builtin_{un, }pack_vector_int128 with vsx [PR109932] X-Act-Checkin: gcc X-Git-Author: Kewen Lin X-Git-Refname: refs/heads/releases/gcc-12 X-Git-Oldrev: 90e1030d4c6d981c2293d89db6d1d57c057ad61d X-Git-Newrev: 31d88c795a0eb05df5a0684c34ec74116cce133f Message-Id: <20230620032052.0F6713858401@sourceware.org> Date: Tue, 20 Jun 2023 03:20:52 +0000 (GMT) List-Id: https://gcc.gnu.org/g:31d88c795a0eb05df5a0684c34ec74116cce133f commit r12-9713-g31d88c795a0eb05df5a0684c34ec74116cce133f Author: Kewen Lin Date: Mon Jun 12 01:08:22 2023 -0500 rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932] As PR109932 shows, builtins __builtin_{un,}pack_vector_int128 should be guarded under vsx rather than power7, as their corresponding bif patterns have the conditions TARGET_VSX and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to move __builtin_{un,}pack_vector_int128 to stanza vsx to ensure their supports. PR target/109932 gcc/ChangeLog: * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128, __builtin_unpack_vector_int128): Move from stanza power7 to vsx. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr109932-1.c: New test. * gcc.target/powerpc/pr109932-2.c: New test. (cherry picked from commit ff83d1b47aadcdaf80a4fda84b0dc00bb2cd3641) Diff: --- gcc/config/rs6000/rs6000-builtins.def | 14 +++++++------- gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 16 ++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 16 ++++++++++++++++ 3 files changed, 39 insertions(+), 7 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def index dd39a27be40..d2c0565dc62 100644 --- a/gcc/config/rs6000/rs6000-builtins.def +++ b/gcc/config/rs6000/rs6000-builtins.def @@ -2008,6 +2008,13 @@ const vsll __builtin_vsx_xxspltd_2di (vsll, const int<1>); XXSPLTD_V2DI vsx_xxspltd_v2di {} + const vsq __builtin_pack_vector_int128 (unsigned long long, \ + unsigned long long); + PACK_V1TI packv1ti {} + + const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); + UNPACK_V1TI unpackv1ti {} + ; Power7 builtins (ISA 2.06). [power7] @@ -2029,16 +2036,9 @@ const unsigned int __builtin_divweu (unsigned int, unsigned int); DIVWEU diveu_si {} - const vsq __builtin_pack_vector_int128 (unsigned long long, \ - unsigned long long); - PACK_V1TI packv1ti {} - void __builtin_ppc_speculation_barrier (); SPECBARR speculation_barrier {} - const unsigned long __builtin_unpack_vector_int128 (vsq, const int<1>); - UNPACK_V1TI unpackv1ti {} - ; Power7 builtins requiring 64-bit GPRs (even with 32-bit addressing). [power7-64] diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c new file mode 100644 index 00000000000..3e3f9eaa65e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mno-vsx" } */ + +/* Verify there is no ICE but one expected error message instead. */ + +#include + +extern vector signed __int128 res_vslll; +extern unsigned long long aull[2]; + +void +testVectorInt128Pack () +{ + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c new file mode 100644 index 00000000000..3e3f9eaa65e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c @@ -0,0 +1,16 @@ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mno-vsx" } */ + +/* Verify there is no ICE but one expected error message instead. */ + +#include + +extern vector signed __int128 res_vslll; +extern unsigned long long aull[2]; + +void +testVectorInt128Pack () +{ + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +} +