From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2063) id AC5DA3858D1E; Tue, 20 Jun 2023 09:30:25 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org AC5DA3858D1E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1687253425; bh=nof+c48AJDgmeEOEW4+K5dHeAwK+9oQOn2FEetq3nIM=; h=From:To:Subject:Date:From; b=G/ZM8K+yKJAhVAfgcNd2QPioCU6F1G0Zd2dPkrELnWNslWKohnBH2Sgc0qtWL8H1I oQDgq8nhAA2foy/SDyhTUYfMIbuqC/i6k6+g7/SY8ICWiyOl5vrZg474Nb9N4uUDtc jwMkXHA2R73DCJuIQ3Cs+G83ibUBFNJYp5qrjA3s= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Kewen Lin To: gcc-cvs@gcc.gnu.org Subject: [gcc r10-11455] rs6000: Guard __builtin_{un, }pack_vector_int128 with vsx [PR109932] X-Act-Checkin: gcc X-Git-Author: Kewen Lin X-Git-Refname: refs/heads/releases/gcc-10 X-Git-Oldrev: 273e4d282dae6d0c600cbe240caae33ab2f7de44 X-Git-Newrev: 98763feef24b58573fa9e6c6eedaccc1e932bb46 Message-Id: <20230620093025.AC5DA3858D1E@sourceware.org> Date: Tue, 20 Jun 2023 09:30:25 +0000 (GMT) List-Id: https://gcc.gnu.org/g:98763feef24b58573fa9e6c6eedaccc1e932bb46 commit r10-11455-g98763feef24b58573fa9e6c6eedaccc1e932bb46 Author: Kewen Lin Date: Tue Jun 20 01:40:52 2023 -0500 rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [PR109932] As PR109932 shows, builtins __builtin_{un,}pack_vector_int128 should be guarded under vsx rather than power7, as their corresponding bif patterns have the conditions TARGET_VSX and VECTOR_MEM_ALTIVEC_OR_VSX_P (V1TImode). This patch is to ensure __builtin_{un,}pack_vector_int128 only available under vsx. PR target/109932 gcc/ChangeLog: * config/rs6000/rs6000-builtin.def (BU_VSX_MISC_2): New macro. ({un,}pack_vector_int128): Use BU_VSX_MISC_2 instead of BU_P7_MISC_2. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr109932-1.c: New test. * gcc.target/powerpc/pr109932-2.c: New test. (cherry picked from commit db291447877aae67979ce3655fcc6fc877f57c6a) Diff: --- gcc/config/rs6000/rs6000-builtin.def | 12 ++++++++++-- gcc/testsuite/gcc.target/powerpc/pr109932-1.c | 17 +++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr109932-2.c | 17 +++++++++++++++++ 3 files changed, 44 insertions(+), 2 deletions(-) diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 36ba145ad3d..52ca2416e36 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -320,6 +320,14 @@ | RS6000_BTC_SPECIAL), \ CODE_FOR_nothing) /* ICODE */ +#define BU_VSX_MISC_2(ENUM, NAME, ATTR, ICODE) \ + RS6000_BUILTIN_2 (MISC_BUILTIN_ ## ENUM, /* ENUM */ \ + "__builtin_" NAME, /* NAME */ \ + RS6000_BTM_VSX, /* MASK */ \ + (RS6000_BTC_ ## ATTR /* ATTR */ \ + | RS6000_BTC_BINARY), \ + CODE_FOR_ ## ICODE) /* ICODE */ + /* VSX overloaded builtin function macros. */ #define BU_VSX_OVERLOAD_1(ENUM, NAME) \ RS6000_BUILTIN_1 (VSX_BUILTIN_VEC_ ## ENUM, /* ENUM */ \ @@ -2589,8 +2597,8 @@ BU_LDBL128_2 (UNPACK_TF, "unpack_longdouble", CONST, unpacktf) BU_IBM128_2 (PACK_IF, "pack_ibm128", CONST, packif) BU_IBM128_2 (UNPACK_IF, "unpack_ibm128", CONST, unpackif) -BU_P7_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti) -BU_P7_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti) +BU_VSX_MISC_2 (PACK_V1TI, "pack_vector_int128", CONST, packv1ti) +BU_VSX_MISC_2 (UNPACK_V1TI, "unpack_vector_int128", CONST, unpackv1ti) /* 2 argument DFP (Decimal Floating Point) functions added in ISA 3.0. */ BU_P9_DFP_MISC_2 (TSTSFI_LT_DD, "dtstsfi_lt_dd", CONST, dfptstsfi_lt_dd) diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-1.c b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c new file mode 100644 index 00000000000..374d9f60618 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-1.c @@ -0,0 +1,17 @@ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mno-vsx" } */ + +/* Verify there is no ICE but one expected error message instead. */ + +#include + +extern vector signed __int128 res_vslll; +extern unsigned long long aull[2]; + +void +testVectorInt128Pack () +{ + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +} + diff --git a/gcc/testsuite/gcc.target/powerpc/pr109932-2.c b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c new file mode 100644 index 00000000000..374d9f60618 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr109932-2.c @@ -0,0 +1,17 @@ +/* { dg-require-effective-target int128 } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mno-vsx" } */ + +/* Verify there is no ICE but one expected error message instead. */ + +#include + +extern vector signed __int128 res_vslll; +extern unsigned long long aull[2]; + +void +testVectorInt128Pack () +{ + res_vslll = __builtin_pack_vector_int128 (aull[0], aull[1]); /* { dg-error "'__builtin_pack_vector_int128' requires the '-mvsx' option" } */ +} +