public inbox for gcc-cvs@sourceware.org help / color / mirror / Atom feed
From: GCC Administrator <gccadmin@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-2025] Daily bump. Date: Thu, 22 Jun 2023 00:17:30 +0000 (GMT) [thread overview] Message-ID: <20230622001731.01DBD3858D28@sourceware.org> (raw) https://gcc.gnu.org/g:80e9ca0e36cc3ec1153c16764fa922875750c17a commit r14-2025-g80e9ca0e36cc3ec1153c16764fa922875750c17a Author: GCC Administrator <gccadmin@gcc.gnu.org> Date: Thu Jun 22 00:17:09 2023 +0000 Daily bump. Diff: --- gcc/ChangeLog | 227 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 6 ++ gcc/fortran/ChangeLog | 34 ++++++++ gcc/testsuite/ChangeLog | 49 +++++++++++ 5 files changed, 317 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2d9e42568ae..a82f00f09bd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,230 @@ +2023-06-21 Uros Bizjak <ubizjak@gmail.com> + + * function.h (emit_initial_value_sets): + Change return type from int to void. + (aggregate_value_p): Change return type from int to bool. + (prologue_contains): Ditto. + (epilogue_contains): Ditto. + (prologue_epilogue_contains): Ditto. + * function.cc (temp_slot): Make "in_use" variable bool. + (make_slot_available): Update for changed "in_use" variable. + (assign_stack_temp_for_type): Ditto. + (emit_initial_value_sets): Change return type from int to void + and update function body accordingly. + (instantiate_virtual_regs): Ditto. + (rest_of_handle_thread_prologue_and_epilogue): Ditto. + (safe_insn_predicate): Change return type from int to bool. + (aggregate_value_p): Change return type from int to bool + and update function body accordingly. + (prologue_contains): Change return type from int to bool. + (prologue_epilogue_contains): Ditto. + +2023-06-21 Alexander Monakov <amonakov@ispras.ru> + + * common.opt (fp_contract_mode) [on]: Remove fallback. + * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test. + * doc/invoke.texi (-ffp-contract): Update. + * trans-mem.cc (diagnose_tm_1): Skip internal function calls. + +2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): + Add alternatives to prefer to avoid same input and output Z register. + (mask_gather_load<mode><v_int_container>): Likewise. + (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. + (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. + (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): + Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): + Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_sxtw): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_uxtw): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (*aarch64_ldff1_gather<mode>_sxtw): Likewise. + (*aarch64_ldff1_gather<mode>_uxtw): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> + <VNx4_NARROW:mode>): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_sxtw): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_uxtw): Likewise. + * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. + (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> + <SVE_PARTIAL_I:mode>): Likewise. + +2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): + Convert to compact alternatives syntax. + (mask_gather_load<mode><v_int_container>): Likewise. + (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. + (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. + (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): + Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): + Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_sxtw): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_uxtw): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (*aarch64_ldff1_gather<mode>_sxtw): Likewise. + (*aarch64_ldff1_gather<mode>_uxtw): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> + <VNx4_NARROW:mode>): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_sxtw): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_uxtw): Likewise. + * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. + (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> + <SVE_PARTIAL_I:mode>): Likewise. + +2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + Revert: + 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): + Convert to compact alternatives syntax. + (mask_gather_load<mode><v_int_container>): Likewise. + (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. + (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. + (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): + Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): + Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_sxtw): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_uxtw): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (*aarch64_ldff1_gather<mode>_sxtw): Likewise. + (*aarch64_ldff1_gather<mode>_uxtw): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> + <VNx4_NARROW:mode>): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_sxtw): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_uxtw): Likewise. + * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. + (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> + <SVE_PARTIAL_I:mode>): Likewise. + +2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai> + + * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc. + (get_len_load_store_mode): Ditto. + * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h. + (get_len_load_store_mode): Ditto. + * optabs-tree.cc (can_vec_mask_load_store_p): New function. + (get_len_load_store_mode): Ditto. + * optabs-tree.h (can_vec_mask_load_store_p): Ditto. + (get_len_load_store_mode): Ditto. + * tree-if-conv.cc: include optabs-tree instead of optabs-query + +2023-06-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use + split_constant_offset for the POINTER_PLUS_EXPR case. + +2023-06-21 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-ivopts.cc (record_group_use): Use + split_constant_offset. + +2023-06-21 Richard Biener <rguenther@suse.de> + + * tree-loop-distribution.cc (classify_builtin_st): Use + split_constant_offset. + * tree-ssa-loop-ivopts.h (strip_offset): Remove. + * tree-ssa-loop-ivopts.cc (strip_offset): Make static. + +2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>): + Convert to compact alternatives syntax. + (mask_gather_load<mode><v_int_container>): Likewise. + (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise. + (*mask_gather_load<mode><v_int_container>_sxtw): Likewise. + (*mask_gather_load<mode><v_int_container>_uxtw): Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>): + Likewise. + (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>): + Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_sxtw): Likewise. + (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode> + <SVE_2BHSI:mode>_uxtw): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (@aarch64_ldff1_gather<mode>): Likewise. + (*aarch64_ldff1_gather<mode>_sxtw): Likewise. + (*aarch64_ldff1_gather<mode>_uxtw): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode> + <VNx4_NARROW:mode>): Likewise. + (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_sxtw): Likewise. + (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode> + <VNx2_NARROW:mode>_uxtw): Likewise. + * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise. + (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode> + <SVE_PARTIAL_I:mode>): Likewise. + +2023-06-21 Tamar Christina <tamar.christina@arm.com> + + PR other/110329 + * doc/md.texi: Replace backslashchar. + +2023-06-21 Richard Biener <rguenther@suse.de> + + * config/i386/i386.cc (ix86_vector_costs::finish_cost): + Overload. For masked main loops make sure the vectorization + factor isn't more than double the number of iterations. + +2023-06-21 Jan Beulich <jbeulich@suse.com> + + * config/i386/i386-expand.cc (ix86_expand_copysign): Request + value duplication by ix86_build_signbit_mask() when AVX512F and + not HFmode. + * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to + 2-alternative form. Adjust "mode" attribute. Add "enabled" + attribute. + (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F + && !TARGET_PREFER_AVX256. + (*<avx512>_vpternlog<mode>_2): Likewise. + (*<avx512>_vpternlog<mode>_3): Likewise. + +2023-06-21 liuhongt <hongtao.liu@intel.com> + + PR target/110018 + * tree-vect-stmts.cc (vectorizable_conversion): Use + intermiediate integer type for float_expr/fix_trunc_expr when + direct optab is not existed. + 2023-06-20 Tamar Christina <tamar.christina@arm.com> PR bootstrap/110324 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 047f836b4f3..2fa39115675 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20230621 +20230622 diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index c326324ae2c..c78ad9cb932 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,9 @@ +2023-06-21 Alexander Monakov <amonakov@ispras.ru> + + * c-gimplify.cc (fma_supported_p): New helper. + (c_gimplify_expr) [PLUS_EXPR, MINUS_EXPR]: Implement FMA + contraction. + 2023-06-16 Alex Coplan <alex.coplan@arm.com> * c.opt (Welaborated-enum-base): New. diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 147fb1d9d81..f0424c638b7 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,37 @@ +2023-06-21 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/87477 + PR fortran/88688 + PR fortran/94380 + PR fortran/107900 + PR fortran/110224 + * decl.cc (char_len_param_value): Fix memory leak. + (resolve_block_construct): Remove unnecessary static decls. + * expr.cc (gfc_is_ptr_fcn): New function. + (gfc_check_vardef_context): Use it to permit pointer function + result selectors to be used for associate names in variable + definition context. + * gfortran.h: Prototype for gfc_is_ptr_fcn. + * match.cc (build_associate_name): New function. + (gfc_match_select_type): Use the new function to replace inline + version and to build a new associate name for the case where + the supplied associate name is already used for that purpose. + * resolve.cc (resolve_assoc_var): Call gfc_is_ptr_fcn to allow + associate names with pointer function targets to be used in + variable definition context. + * trans-decl.cc (gfc_get_symbol_decl): Unlimited polymorphic + variables need deferred initialisation of the vptr. + (gfc_trans_deferred_vars): Do the vptr initialisation. + * trans-stmt.cc (trans_associate_var): Ensure that a pointer + associate name points to the target of the selector and not + the selector itself. + +2023-06-21 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/108961 + * trans-expr.cc (gfc_conv_procedure_call): The hidden string + length must not be passed to a formal arg of type(cptr). + 2023-06-20 Tobias Burnus <tobias@codesourcery.com> * dump-parse-tree.cc (show_omp_namelist): Fix dump of the allocator diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3e3f0ad68bd..6ff4c0d88c4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,52 @@ +2023-06-21 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/87477 + PR fortran/107900 + PR fortran/110224 + PR fortran/88688 + PR fortran/94380 + PR fortran/95398 + * gfortran.dg/pr107900.f90 : New test + * gfortran.dg/pr110224.f90 : New test + * gfortran.dg/pr88688.f90 : New test + * gfortran.dg/pr94380.f90 : New test + * gfortran.dg/pr95398.f90 : Set -std=f2008, bump the line + numbers in the error tests by two and change the text in two. + +2023-06-21 Paul Thomas <pault@gcc.gnu.org> + + PR fortran/108961 + * gfortran.dg/pr108961.f90: New test. + +2023-06-21 Uros Bizjak <ubizjak@gmail.com> + + PR target/110018 + * gcc.target/i386/pr110018-1.c: Use explicit signed types. + * gcc.target/i386/pr110018-2.c: New test. + +2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/sve/gather_earlyclobber.c: New test. + * gcc.target/aarch64/sve2/gather_earlyclobber.c: New test. + +2023-06-21 Richard Biener <rguenther@suse.de> + + * gcc.target/i386/vect-partial-vectors-1.c: New testcase. + * gcc.target/i386/vect-partial-vectors-2.c: Likewise. + +2023-06-21 Jan Beulich <jbeulich@suse.com> + + * gcc.target/i386/avx512f-copysign.c: New test. + +2023-06-21 Jan Beulich <jbeulich@suse.com> + + * gcc.target/i386/avx512f-dupv2di.c: Add + -mprefer-vector-width=512. + +2023-06-21 liuhongt <hongtao.liu@intel.com> + + * gcc.target/i386/pr110018-1.c: New test. + 2023-06-20 Lewis Hyatt <lhyatt@gmail.com> PR c++/66290
reply other threads:[~2023-06-22 0:17 UTC|newest] Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230622001731.01DBD3858D28@sourceware.org \ --to=gccadmin@gcc.gnu.org \ --cc=gcc-cvs@gcc.gnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).