[gcc r14-2453] riscv: Define Xmode macro

[gcc r14-2453] riscv: Define Xmode macro

[Kito Cheng]

https://gcc.gnu.org/g:a3480aacc4ab01651725a63e05829a43bc23d549

commit r14-2453-ga3480aacc4ab01651725a63e05829a43bc23d549
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Tue Apr 25 15:24:13 2023 +0200

    riscv: Define Xmode macro
    
    Define a Xmode macro that specifies the registers size (XLEN)
    similar to Pmode. This allows the backend code to write generic
    RV32/RV64 C code (under certain circumstances).
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.h (Xmode): New macro.
    
    Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>

Diff:
---
 gcc/config/riscv/riscv.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 83dcac165b5..7d548ac4b23 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -800,6 +800,10 @@ typedef struct {
 
 #define Pmode word_mode
 
+/* Specify the machine mode that registers have.  */
+
+#define Xmode (TARGET_64BIT ? DImode : SImode)
+
 /* Give call MEMs SImode since it is the "most permissive" mode
    for both 32-bit and 64-bit targets.  */