[gcc/riscv/heads/gcc-13-with-riscv-opts] (438 commits) DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE

[gcc/riscv/heads/gcc-13-with-riscv-opts] (438 commits) DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE

[Jeff Law]

The branch 'riscv/heads/gcc-13-with-riscv-opts' was updated to point to:

 a139bad18d2... DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE

It previously pointed to:

 f36a9241ab1... DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE

Diff:

!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
-------------------------------------------------------------------

  f36a924... DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE
  cfa303b... GIMPLE_FOLD: Fix gimple fold for LEN_{MASK}_{LOAD,STORE}
  420921b... RISC-V: Remove duplicated extern function_base decl
  5adbb7e... RISC-V: Remove redundant vcond patterns
  cee722a... SCCVN: Fix repeating variable name "len"
  d829fb9... RISC-V: Fix one test failure of dg config.
  7a6bb7a... RISC-V: Optimize VSETVL codegen of SELECT_VL with LEN_MASK_
  5b8f16c... RISC-V: fix expand function of vlmul_ext RVV intrinsic
  a0af5ae... RISC-V: Enable len_mask{load, store} and remove len_{load, 
  791b0a2... internal-fn: Fix bug of BIAS argument index
  df62998... Revert "RISC-V:Add float16 tuple type abi"
  b88f160... Revert "RISC-V:Add float16 tuple type support"
  ae3a682... GIMPLE_FOLD: Apply LEN_MASK_{LOAD,STORE} into GIMPLE_FOLD
  3f0628f... SSA ALIAS: Apply LEN_MASK_STORE to 'ref_maybe_used_by_call_
  f892def... SSA ALIAS: Apply LEN_MASK_{LOAD, STORE} into SSA alias anal
  d5426b4... RISC-V:Add float16 tuple type abi
  ae56c22... RISC-V: Refactor the integer ternary autovec pattern
  8652f8c... RISC-V: Support RVV floating-point auto-vectorization
  0fb73df... LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}
  ae0ac44... IVOPTS: Add LEN_MASK_{LOAD, STORE} into 'get_alias_ptr_type
  a89a891... VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer
  0ab2e8d... Move can_vec_mask_load_store_p and get_len_load_store_mode 
  cb46083... RISC-V: testsuite: Add missing -mabi=lp64d.
  9af4b37... RISC-V: Set the natural size of constant vector mask modes 
  a10ed7d... RISC-V: Optimize codegen of VLA SLP
  1cfb993... RISC-V: testsuite: Add -Wno-psabi to vec_set/vec_extract te
  1a1df7a... RISC-V: Fix compiler warning of riscv_arg_has_vector
  b5be247... RISC-V: testsuite: Fix vmul test expectation and fix -ffast
  7106245... RISC-V: Fix fails of testcases
  9abf3ee... RISC-V: Add tuple vector mode psABI checking and simplify c
  75399fe... RISC-V: Save and restore FCSR in interrupt functions to avo
  febf4ac... RISC-V: Fix VWEXTF iterator requirement
  7e74282... RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
  69cc9e7... RISC-V: Bugfix for RVV float reduction in ZVE32/64
  3398e8c... VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs
  4885d06... RISC-V: Add autovec FP unary operations.
  a9a72aa... RISC-V: Add autovec FP binary operations.
  dcbd56b... RISC-V: Add sign-extending variants for vmv.x.s.
  3b2e593... RISC-V: Implement vec_set and vec_extract.
  30af1e2... RISC-V: Add (u)int8_t to binop tests.
  e9881a1... RISC-V: Fix one typo for reduc expand GET_MODE_CLASS
  0b99760... RISC-V:Add float16 tuple type support
  599583c... RISC-V: Bugfix for RVV integer reduction in ZVE32/64.
  2b227a4... RISC-V: Fix VL operand bug in VSETVL PASS[PR110264]
  63e7c34... RISC-V: Fix one warning of maybe-uninitialized in riscv-vse
  9bf1bcc... cprop_hardreg: Enable propagation of the stack pointer if p
  dbc9274... RISC-V: Use merge approach to optimize vector permutation
  d468ad1... RISC-V: Ensure vector args and return use function stack to
  424975c... RISC-V: Align the predictor style for define_insn_and_split
  b4e9444... RISC-V: Bugfix for vec_init repeating auto vectorization in
  17f9b68... RISC-V: Remove duplicate `#include "riscv-vector-switch.def
  38e32f9... RISC-V: Add comments of some functions
  8c6f53d... RISC-V: Add more SLP tests
  fe5722d... RISC-V: Fix bug of VLA SLP auto-vectorization
  bf8a43a... RISC-V: Add vector psabi checking.
  1e48e2e... RISC-V: Fix one typo in full-vec-movel test
  992a41c... RISC-V: Fix V_WHOLE && V_FRACT iterator requirement
  0639fd5... RISC-V: Enhance RVV VLA SLP auto-vectorization with decompr
  a97440f... RISC-V: Fix one potential test failure for RVV vsetvl
  8f8cb75... RISC-V: Support RVV FP16 MISC vget/vset intrinsic API
  8d997ca... RISC-V: Add RVV narrow shift right lowering auto-vectorizat
  2ac4439... RISC-V: Add ZVFHMIN block autovec testcase
  00b5887... RISC-V: Add test cases for RVV FP16 undefined and vlmul tru
  dba6a12... RISC-V: Support RVV FP16 MISC vlmul ext intrinsic API
  a2d22bd... RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS
  cdb8b1f... RISC-V: Add test cases for RVV FP16 vreinterpret
  c38964e... RISC-V: Enable select_vl for RVV auto-vectorization
  f7d97a1... VECT: Add SELECT_VL support
  8ddd2bb... RISC-V: Refactor requirement of ZVFH and ZVFHMIN.
  5c9b570... RISC-V: Fix one warning of frm enum.
  90b71ed... RISC-V: Add more test cases for RVV FP16
  5d3c5aa... RISC-V: Eliminate extension after for *w instructions
  d593f7b... riscv: Fix scope for memory model calculation
  aee3d98... riscv: Fix insn cost calculation
  0c83355... RISC-V: Support RVV VLA SLP auto-vectorization
  2978cfb... RISC-V: Fix ICE when include riscv_vector.h with rv64gcv
  d9db4f6... RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering op
  9bdfdbd... RISC-V] add TC for save-restore cfi directives.
  c586f61... RISC-V: Support RVV FP16 ZVFH Reduction floating-point intr
  b18d937... [RISC-V] correct machine mode in save-restore cfi RTL.
  b811d1b... RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector
  f87acf2... RISC-V: Fix some typo in vector-iterators.md
  a3a7e8e... Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
  f02abc2... RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
  32d2f01... RISC-V: Reorganize riscv-v.cc
  717961c... RISC-V: Split arguments of expand_vec_perm
  02ebc38... RISC-V: Remove redundant vlmul_ext_* patterns to fix PR1101
  3690ad1... RISC-V: Support RVV FP16 ZVFHMIN intrinsic API
  9463f6c... RISC-V: Move optimization patterns into autovec-opt.md
  aaa7400... RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill
  2189799... [RISC-V] fix cfi issue in save-restore.
  467e03b... Remove unnecessary md pattern for TARGET_XTHEADCONDMOV
  a34ea2a... RISC-V: Fix warning in predicated.md
  d71d810... RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv ins
  abcc3ad... VECT: Change flow of decrement IV
  e01aa15... RISC-V: Add _mu C++ overloaded intrinsics for load && viota
  bce4711... RISC-V: Optimize reverse series index vector
  0046b8c... RISC-V: Fix warning in predicated.md
  22ddc61... RISC-V: Add test for vfloat16*_t (non tuple) types
  8f59749... RISC-V: Add __RISCV_ prefix to VXRM and FRM enum
  5eb44c6... RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering o
  db1d38e... RISC-V: Support RVV permutation auto-vectorization
  52636b3... testsuite: Unbork multilib setups using -march flags (RISC-
  756c36b... RISC-V: Introduce vfloat16m{f}*_t and their machine mode.
  88ca3b0... RISC-V: Add RVV FRM enum for floating-point rounding mode i
  d483962... RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering 
  ee7abd8... RISC-V: Add testcase for vrsub.vi auto-vectorization
  94d27ee... RISC-V: Remove FRM for vfwcvt (RVV float to float widening 
  2b281ab... RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to floa
  da4570c... RISC-V: Remove FRM for vfncvt.rod instruction
  5c8f937... RISC-V: Add ZVFH extension to the -march= option
  1f6ec60... RISC-V: Fix unreachable test code for init repeat sequence.
  c42d2b3... RISC-V: Allow all const_vec_duplicates as constants.
  2b61af4... riscv: add work around for PR sanitizer/82501
  2a1c036... riscv: update riscv_asan_shadow_offset
  7cee77f... RISC-V: Add floating-point to integer conversion RVV auto-v
  6b651d6... RISC-V: Fix warning in riscv.md
  9ce9532... RISC-V: Add RVV FNMA auto-vectorization support
  cceebf0... RISC-V: Optimize TARGET_XTHEADCONDMOV
  09af49d... RISC-V: Use extension instructions instead of bitwise "and"
  658fee4... RISC-V: Refactor comments and naming of riscv-v.cc.
  b9d8c6a... RISC-V: Eliminate the magic number in riscv-v.cc
  cfa3e54... RISC-V: Using merge approach to optimize repeating sequence
  57ffcad... RISC-V: Fix VSETVL PASS ICE on SLP auto-vectorization
  a8c162d... RISC-V: Remove redundant printf of abs-run.c
  ac49f29... RISC-V: Add RVV FMA auto-vectorization support
  4cc5ac1... RISC-V: Fix ternary instruction attribute bug
  567f3d8... RISC-V: Fix incorrect VXRM configuration in mode switching 
  d220c71... RISC-V: Add ZVFHMIN extension to the -march= option
  f1287c2... RISC-V: Implement autovec abs, vneg, vnot.
  17bc7ec... RISC-V: Add autovec sign/zero extension and truncation.
  17ab086... RISC-V: Fix zero-scratch-regs-3.c fail
  3a18e2c... In pipeline scheduling, insns should not be fusion in diffe
  0235955... VECT: Add decrement IV iteration loop control by variable a
  309b0c9... RISC-V: Remove FRM_REGNUM dependency for rtx conversions
  f0e53f9... RISC-V: Add FRM_ prefix to dynamic rounding mode enum
  fe21f4d... RISC-V: Add RVV mask logic auto-vectorization
  253a6a4... RISC-V: Add RVV comparison autovectorization
  43de0f7... RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_
  82775b8... RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t
  3d6eb6b... RISC-V: Fix incorrect code of reaching inaccessible memory 
  b95cd90... RISC-V: Fix magic number of RVV auto-vectorization expander
  0b7b581... RISC-V: Fix warning of vxrm pattern
  1c08034... RISC-V: Refactor the framework of RVV auto-vectorization
  e84fc30... RISC-V: Add "m_" prefix for private member
  eb09341... RISC-V: Fix typo of multiple_rgroup-2.h
  694faf8... VECT: Fix bug of multiple-rgroup for length is counting ele
  f18026e... RISC-V: Reorganize the code of CONST_VECTOR handling in ris
  e249122... RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2
  1114152... Mode-Switching: Fix local array maybe uninitialized warning
  9e2c540... Fix riscv_expand_conditional_move.
  7cc982b... Add bext pattern for ZBS
  85ac00a... RISC-V: Fix CTZ unnecessary sign extension [PR #106888]
  5c3c374... RISC-V: Remove masking third operand of rotate instructions
  8d521bc... RISC-V: improve codegen for large constants with same 32-bi
  362a89e... RISC-V: testsuite: Remove empty *-run-template.h.
  9ceaf99... RISC-V: Allow more loading of const vectors.
  2fb511a... Machine_Mode: Extend machine_mode from 8 to 16 bits
  537fd92... Fix type error of 'switch (SUBREG_BYTE (op)).'
  7873002... RISC-V: Remove trailing spaces on lines.
  1650fce... Partial cherry-pick of this patch (just the riscv bits):
  9738bda... RISC-V: Remove masking third operand of rotate instructions
  2942d32... RISC-V: Add mode switching target hook to insert rounding m
  aa11bf1... RISC-V: Introduce rounding mode operand into fixed-point in
  4a53210... RISC-V: Add rounding mode enum for fixed-point intrinsics
  5f7d87e... RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_
  d825266... RISC-V: Fix wrong select_kind in riscv_compute_multilib
  81b7397... RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests
  b397c25... RISC-V: Add FRM and rounding mode operand into floating poi
  3b6c766... RISC-V: Add rounding mode operand for fixed-point patterns
  88c4a01... OPTABS: Extend the number of expanding instructions pattern
  bb0eed8... RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorizatio
  42f4b10... RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT
  9160e78... RISC-V: Refactor the or pattern to switch cases
  725ba0b... RISC-V: Pull out function call with side effect from gcc_as
  8b1e86c... RISC-V: Improve vector_insn_info::dump for LMUL and policy
  8e8e6f4... RISC-V: Optimize vsetvli of LCM INSERTED edge for user vset
  9652b28... RISC-V: Suppress unused parameter warning in riscv-common.c
  c0443d4... RISC-V: Fix fail of vmv-imm-rv64.c in rv32
  185b40c... RISC-V: Add basic vec_init for VLS RVV auto-vectorization
  2b57ebe... RISC-V: Reorganize binary autovec testcases
  42dee86... RISC-V: Fix RVV binary auto-vectorizaiton test fails
  c0973de... Var-Tracking: Typedef pointer_mux<tree_node, rtx_def> as de
  69f3ad8... RISC-V: Allow vector constants in riscv_const_insns.
  1c42921... RISC-V: Update RVV integer compare simplification comments
  c000345... RISC-V: Add autovectorization tests for binary integer oper
  0ed74ae... RISC-V: Split off shift patterns for autovectorization.
  08c9b89... RISC-V: Clarify vlmax and length handling.
  b500a09... RISC-V: Add vectorized binops and insn_expander helpers.
  4bba966... VECT: Add tree_code into "creat_iv" and allow it can handle
  c9596f0... RISC-V: Support const series vector for RVV auto-vectorizat
  1a29bce... RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instru
  91ce874... RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SU
  c27fd67... RISC-V: Fix dead loop for user vsetvli intrinsic avl checki
  48c595d... RISC-V: Factor out vector manager code in vsetvli insertion
  bdae12b... RISC-V: Improve portability of testcases
  0a035b9... RISC-V: Fix ugly && incorrect codes of RVV auto-vectorizati
  5b370ed... RISC-V: Handle multi-lib path correclty for linux
  052fac7... Delete duplicated riscv definition.
  3cd6db1... RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple 
  7214ae8... RISC-V:autovec: Add target vectorization hooks
  908cdc9... Remove duplicated definition in risc-v vector support.
  1fb4a45... RISC-V:autovec: Add auto-vectorization support functions
  8d24f9a... RISC-V: autovec: Export policy functions to global scope
  52b95e7... RISC-V: autovec: Add new predicates and function prototypes
  4f6d34a... RISC-V: Enable basic RVV auto-vectorization support.
  13fffad... RISC-V: Fix incorrect demand info merge in local vsetvli op
  286a7ca... RISC-V: Legitimise the const0_rtx for RVV indexed load/stor
  7502192... RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
  9800db5... RISC-V: Fix PR109615
  0fe478d... riscv: fix error: control reaches end of non-void function
  8d1fc9c... RISC-V: Support segment intrinsics
  e23c1b0... RISC-V: Add tuple type vget/vset intrinsics
  41be7a6... RISC-V: Add tuple types support
  47312d9... RISC-V: Table A.6 conformance tests
  a58a3aa... RISC-V: Weaken atomic loads
  f9a5dc7... RISC-V: Weaken mem_thread_fence
  4362f21... RISC-V: Weaken LR/SC pairs
  5283139... RISC-V: Eliminate AMO op fences
  76bd390... RISC-V: Strengthen atomic stores
  a7559fc... RISC-V: Add AMO release bits
  48a1cc9... RISC-V: Enforce atomic compare_exchange SEQ_CST
  03d307e... RISC-V: Enforce subword atomic LR/SC SEQ_CST
  dce6baa... RISC-V: Enforce Libatomic LR/SC SEQ_CST
  4763132... RISC-V: Eliminate SYNC memory models
  2c67fea... RISC-V: ICE for vlmul_ext_v intrinsic API
  01f1702... RISC-V: fix build issue with gcc 4.9.x
  6776150... RISC-V: decouple stack allocation for rv32e w/o save-restor
  ff90f59... RISC-V: Add divmod expansion support
  15ebf19... RISC-V: Added support clmul[r,h] instructions for Zbc exten
  7c14338... RISC-V: Eliminate redundant zero extension of minu/maxu ope
  7357557... RISC-V: Add required tls to read thread pointer test
  f0a48f6... RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR
  f41025c... RISC-V: Legitimise the const0_rtx for RVV load/store addres
  fc18b92... RISC-V: Fine tune vmadc/vmsbc RA constraint
  57aa7fb... RISC-V: Optimize comparison patterns for register allocatio
  3463d29... RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codeg
  da371a4... RISC-V: Fine tune gather load RA constraint
  7d51899... RISC-V: Bugfix for RVV vbool*_t vn_reference_equal
  f532e5e... RISC-V: Add auto-vectorization compile option for RVV
  38467ba... avoid splitting small constants in bcrli_nottwobits pattern
  6933ace... riscv: relax splitter restrictions for creating pseudos
  7deee66... RISC-V: Eliminate redundant vsetvli for duplicate AVL def
  7564b7f... RISC-V: Add function comment for cleanup_insns.
  bfe844d... RISC-V: Optimize fault only first load
  83f8653... RISC-V: Defer vsetvli insertion to later if possible [PR108
  20fba4b... riscv: Fix <bitmanip_insn> fallout.
  6c1171a... RISC-V: Add local user vsetvl instruction elimination [PR10
  02facc4... [PR target/108248] [RISC-V] Break down some bitmanip insn t
  21cfc1e... RISC-V: Fix RVV register order
  b29556c... RISC-V: Fix riscv/arch-19.c with different ISA spec version
  d7364b1... RISC-V: Fix simplify_ior_optimization.c on rv32
  abab44c... RISC-V: Support 128 bit vector chunk
  42ce76d... RISC-V: Align IOR optimization MODE_CLASS condition to AND.
  e3ede9b... vect: Verify that GET_MODE_UNITS is greater than one for ve
  acc8082... Add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and 
  fea58a3... RISC-V: Adjust the parsing order of extensions to be consis
  0b18fae... RISC-V: make the stack manipulation codes more readable.
  7aeb835... RISC-V: optimize stack manipulation in save-restore
  8a7d000... RISC-V: add a new parameter in riscv_first_stack_step.
  b4b740a... RISC-V: Optimze the reverse conditions of rotate shift


Summary of changes (added commits):
-----------------------------------

  a139bad... DSE: Add LEN_MASK_STORE analysis into DSE and fix LEN_STORE
  3dfdeac... GIMPLE_FOLD: Fix gimple fold for LEN_{MASK}_{LOAD,STORE}
  86eda88... RISC-V: Remove duplicated extern function_base decl
  30219bc... RISC-V: Remove redundant vcond patterns
  1b0e4c7... SCCVN: Fix repeating variable name "len"
  ce41f3b... RISC-V: Fix one test failure of dg config.
  7913dc2... RISC-V: Optimize VSETVL codegen of SELECT_VL with LEN_MASK_
  085a496... RISC-V: fix expand function of vlmul_ext RVV intrinsic
  6bfd64d... RISC-V: Enable len_mask{load, store} and remove len_{load, 
  e956a1b... internal-fn: Fix bug of BIAS argument index
  7b3035b... Revert "RISC-V:Add float16 tuple type abi"
  3808e45... Revert "RISC-V:Add float16 tuple type support"
  b82a718... GIMPLE_FOLD: Apply LEN_MASK_{LOAD,STORE} into GIMPLE_FOLD
  1c37170... SSA ALIAS: Apply LEN_MASK_STORE to 'ref_maybe_used_by_call_
  3016f36... SSA ALIAS: Apply LEN_MASK_{LOAD, STORE} into SSA alias anal
  77bfee8... RISC-V:Add float16 tuple type abi
  5ec2c30... RISC-V: Refactor the integer ternary autovec pattern
  944f612... RISC-V: Support RVV floating-point auto-vectorization
  0f36ebf... LOOP IVOPTS: Apply LEN_MASK_{LOAD,STORE}
  bf87f9e... IVOPTS: Add LEN_MASK_{LOAD, STORE} into 'get_alias_ptr_type
  166d1d0... VECT: Apply LEN_MASK_{LOAD,STORE} into vectorizer
  74c4317... Move can_vec_mask_load_store_p and get_len_load_store_mode 
  c2f4edf... RISC-V: testsuite: Add missing -mabi=lp64d.
  aafe743... RISC-V: Set the natural size of constant vector mask modes 
  b367818... RISC-V: Optimize codegen of VLA SLP
  6bbea96... RISC-V: testsuite: Add -Wno-psabi to vec_set/vec_extract te
  52b9ee9... RISC-V: Fix compiler warning of riscv_arg_has_vector
  55fd243... RISC-V: testsuite: Fix vmul test expectation and fix -ffast
  9d50198... RISC-V: Fix fails of testcases
  4b9063e... RISC-V: Add tuple vector mode psABI checking and simplify c
  b0dfe6b... RISC-V: Save and restore FCSR in interrupt functions to avo
  418ef6f... RISC-V: Fix VWEXTF iterator requirement
  16a2940... RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
  1cc1214... RISC-V: Bugfix for RVV float reduction in ZVE32/64
  81e1062... VECT: Support LEN_MASK_{LOAD,STORE} ifn && optabs
  949f680... RISC-V: Add autovec FP unary operations.
  7057605... RISC-V: Add autovec FP binary operations.
  cb54ac3... RISC-V: Add sign-extending variants for vmv.x.s.
  4870084... RISC-V: Implement vec_set and vec_extract.
  16ef4d0... RISC-V: Add (u)int8_t to binop tests.
  fc54969... RISC-V: Fix one typo for reduc expand GET_MODE_CLASS
  59fb7c8... RISC-V:Add float16 tuple type support
  68fee2b... RISC-V: Bugfix for RVV integer reduction in ZVE32/64.
  251a8f8... RISC-V: Fix one warning of maybe-uninitialized in riscv-vse
  7d8ed40... cprop_hardreg: Enable propagation of the stack pointer if p
  63d279b... RISC-V: Use merge approach to optimize vector permutation
  f6140b2... RISC-V: Ensure vector args and return use function stack to
  65c6d6d... RISC-V: Align the predictor style for define_insn_and_split
  17091f4... RISC-V: Bugfix for vec_init repeating auto vectorization in
  a1acd44... RISC-V: Remove duplicate `#include "riscv-vector-switch.def
  d3dde89... RISC-V: Add comments of some functions
  b099888... RISC-V: Add more SLP tests
  c57a7b4... RISC-V: Fix bug of VLA SLP auto-vectorization
  318817e... RISC-V: Add vector psabi checking.
  792ffe3... RISC-V: Fix one typo in full-vec-movel test
  27ec8bb... RISC-V: Fix V_WHOLE && V_FRACT iterator requirement
  570a68f... RISC-V: Enhance RVV VLA SLP auto-vectorization with decompr
  285c0cf... RISC-V: Fix one potential test failure for RVV vsetvl
  c23ecb3... RISC-V: Support RVV FP16 MISC vget/vset intrinsic API
  da6f4fd... RISC-V: Add RVV narrow shift right lowering auto-vectorizat
  f54c749... RISC-V: Add ZVFHMIN block autovec testcase
  efeb8c7... RISC-V: Add test cases for RVV FP16 undefined and vlmul tru
  7ffcceb... RISC-V: Support RVV FP16 MISC vlmul ext intrinsic API
  8c67b4d... RISC-V: Rework Phase 5 && Phase 6 of VSETVL PASS
  8677acf... RISC-V: Add test cases for RVV FP16 vreinterpret
  2c62863... RISC-V: Enable select_vl for RVV auto-vectorization
  c32183b... VECT: Add SELECT_VL support
  10b5fda... RISC-V: Refactor requirement of ZVFH and ZVFHMIN.
  8aeb721... RISC-V: Fix one warning of frm enum.
  789022f... RISC-V: Add more test cases for RVV FP16
  929fa69... RISC-V: Eliminate extension after for *w instructions
  aedf746... riscv: Fix scope for memory model calculation
  31ef97d... riscv: Fix insn cost calculation
  a991e74... RISC-V: Support RVV VLA SLP auto-vectorization
  c66d3e1... RISC-V: Fix ICE when include riscv_vector.h with rv64gcv
  25c4369... RISC-V: Add RVV vwmacc/vwmaccu/vwmaccsu combine lowering op
  657d060... RISC-V] add TC for save-restore cfi directives.
  c24bc4a... RISC-V: Support RVV FP16 ZVFH Reduction floating-point intr
  f3d3fc0... [RISC-V] correct machine mode in save-restore cfi RTL.
  d7b74d9... RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector
  394230f... RISC-V: Fix some typo in vector-iterators.md
  69a68db... Testsuite: Fix a fail about xtheadcondmov-indirect-rv64.c
  1fca156... RISC-V: Support RVV FP16 ZVFH floating-point intrinsic API
  850ac5f... RISC-V: Reorganize riscv-v.cc
  0fed0ba... RISC-V: Split arguments of expand_vec_perm
  7b55cc2... RISC-V: Remove redundant vlmul_ext_* patterns to fix PR1101
  073e55e... RISC-V: Support RVV FP16 ZVFHMIN intrinsic API
  8b128b2... RISC-V: Move optimization patterns into autovec-opt.md
  cf296a0... RISC-V: Support RVV zvfh{min} vfloat16*_t mov and spill
  cef4b93... [RISC-V] fix cfi issue in save-restore.
  11ff95d... Remove unnecessary md pattern for TARGET_XTHEADCONDMOV
  2efb0b5... RISC-V: Fix warning in predicated.md
  37bfc9b... RISC-V: Add pseudo vwmul.wv pattern to enhance vwmul.vv ins
  6923483... VECT: Change flow of decrement IV
  13c44d1... RISC-V: Add _mu C++ overloaded intrinsics for load && viota
  f4802aa... RISC-V: Optimize reverse series index vector
  eb2c2d5... RISC-V: Fix warning in predicated.md
  987d08b... RISC-V: Add test for vfloat16*_t (non tuple) types
  a1d7de1... RISC-V: Add __RISCV_ prefix to VXRM and FRM enum
  c884635... RISC-V: Add vwadd.wv/vwsub.wv auto-vectorization lowering o
  a19daab... RISC-V: Support RVV permutation auto-vectorization
  2d9994e... testsuite: Unbork multilib setups using -march flags (RISC-
  3d874ad... RISC-V: Introduce vfloat16m{f}*_t and their machine mode.
  c973a19... RISC-V: Add RVV FRM enum for floating-point rounding mode i
  4524be5... RISC-V: Add vwadd<u>/vwsub<u>/vwmul<u>/vwmulsu.vv lowering 
  f61e291... RISC-V: Add testcase for vrsub.vi auto-vectorization
  5d2c19e... RISC-V: Remove FRM for vfwcvt (RVV float to float widening 
  758c6e9... RISC-V: Remove FRM for vfwcvt.f.x<u>.v (RVV integer to floa
  6267bf0... RISC-V: Remove FRM for vfncvt.rod instruction
  c4b100a... RISC-V: Add ZVFH extension to the -march= option
  00f42da... RISC-V: Fix unreachable test code for init repeat sequence.
  16d03f1... RISC-V: Allow all const_vec_duplicates as constants.
  b21a920... riscv: add work around for PR sanitizer/82501
  a8b0703... RISC-V: Add floating-point to integer conversion RVV auto-v
  2eea5ba... RISC-V: Fix warning in riscv.md
  303972b... RISC-V: Add RVV FNMA auto-vectorization support
  ba0468e... RISC-V: Optimize TARGET_XTHEADCONDMOV
  ca0a210... RISC-V: Use extension instructions instead of bitwise "and"
  3c42f47... RISC-V: Refactor comments and naming of riscv-v.cc.
  53b52d5... RISC-V: Eliminate the magic number in riscv-v.cc
  1fed9cf... RISC-V: Using merge approach to optimize repeating sequence
  881098d... RISC-V: Fix VSETVL PASS ICE on SLP auto-vectorization
  ea045c6... RISC-V: Remove redundant printf of abs-run.c
  bbfeb58... RISC-V: Add RVV FMA auto-vectorization support
  4362771... RISC-V: Fix incorrect VXRM configuration in mode switching 
  9fa4e82... RISC-V: Add ZVFHMIN extension to the -march= option
  bdab5d6... RISC-V: Implement autovec abs, vneg, vnot.
  ee51955... RISC-V: Add autovec sign/zero extension and truncation.
  61af6a4... RISC-V: Fix zero-scratch-regs-3.c fail
  6635f05... In pipeline scheduling, insns should not be fusion in diffe
  991ba5e... VECT: Add decrement IV iteration loop control by variable a
  f2dddac... RISC-V: Remove FRM_REGNUM dependency for rtx conversions
  a2eb658... RISC-V: Add FRM_ prefix to dynamic rounding mode enum
  f9abefc... RISC-V: Add RVV mask logic auto-vectorization
  b38a123... RISC-V: Add RVV comparison autovectorization
  948a107... RISC-V: Support RVV VREINTERPRET from vbool*_t to vuint*m1_
  ed091e9... RISC-V: Support RVV VREINTERPRET from vbool*_t to vint*m1_t
  41467d6... RISC-V: Fix incorrect code of reaching inaccessible memory 
  023c974... RISC-V: Fix magic number of RVV auto-vectorization expander
  7c8a202... RISC-V: Fix warning of vxrm pattern
  0a5f230... RISC-V: Refactor the framework of RVV auto-vectorization
  1d59903... RISC-V: Add "m_" prefix for private member
  c5666a2... RISC-V: Fix typo of multiple_rgroup-2.h
  7492014... VECT: Fix bug of multiple-rgroup for length is counting ele
  0a3f17d... RISC-V: Reorganize the code of CONST_VECTOR handling in ris
  9e85314... RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool[2
  9f12e3b... Mode-Switching: Fix local array maybe uninitialized warning
  66b9ccc... Fix riscv_expand_conditional_move.
  1c750a5... Add bext pattern for ZBS
  498ab8a... RISC-V: Fix CTZ unnecessary sign extension [PR #106888]
  3ac3d5a... RISC-V: Remove masking third operand of rotate instructions
  17a61c5... RISC-V: improve codegen for large constants with same 32-bi
  2f9e825... RISC-V: testsuite: Remove empty *-run-template.h.
  2803181... RISC-V: Allow more loading of const vectors.
  ee421ed... Machine_Mode: Extend machine_mode from 8 to 16 bits
  a6ef811... Fix type error of 'switch (SUBREG_BYTE (op)).'
  24a88da... RISC-V: Remove trailing spaces on lines.
  3c6f200... Partial cherry-pick of this patch (just the riscv bits):
  ce4d5a5... RISC-V: Remove masking third operand of rotate instructions
  2277793... RISC-V: Add mode switching target hook to insert rounding m
  1ff593a... RISC-V: Introduce rounding mode operand into fixed-point in
  679af77... RISC-V: Add rounding mode enum for fixed-point intrinsics
  6e2bcf3... RISC-V: Support RVV VREINTERPRET from v{u}int*_t to vbool1_
  2013138... RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests
  8a7031f... RISC-V: Add FRM and rounding mode operand into floating poi
  94f2446... RISC-V: Add rounding mode operand for fixed-point patterns
  34036d3... OPTABS: Extend the number of expanding instructions pattern
  24ed5e4... RISC-V: Optimize vsetvl AVL for VLS VLMAX auto-vectorizatio
  313b5bf... RISC-V: Support TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT
  af53cce... RISC-V: Refactor the or pattern to switch cases
  8949c1d... RISC-V: Pull out function call with side effect from gcc_as
  4908278... RISC-V: Improve vector_insn_info::dump for LMUL and policy
  0a0c0e5... RISC-V: Optimize vsetvli of LCM INSERTED edge for user vset
  c408bd9... RISC-V: Fix fail of vmv-imm-rv64.c in rv32
  5b863ad... RISC-V: Add basic vec_init for VLS RVV auto-vectorization
  4be3b33... RISC-V: Reorganize binary autovec testcases
  952b590... RISC-V: Fix RVV binary auto-vectorizaiton test fails
  e11a78e... Var-Tracking: Typedef pointer_mux<tree_node, rtx_def> as de
  aad3073... RISC-V: Allow vector constants in riscv_const_insns.
  b653ed8... RISC-V: Update RVV integer compare simplification comments
  088a13b... RISC-V: Add autovectorization tests for binary integer oper
  1315e9a... RISC-V: Split off shift patterns for autovectorization.
  9f2ba20... RISC-V: Clarify vlmax and length handling.
  611e13f... RISC-V: Add vectorized binops and insn_expander helpers.
  fb55f46... VECT: Add tree_code into "creat_iv" and allow it can handle
  47a76dc... RISC-V: Support const series vector for RVV auto-vectorizat
  e983d21... RISC-V: Insert vsetivli zero, 0 for vmv.x.s/vfmv.f.s instru
  c480b86... RISC-V: Fix incorrect implementation of TARGET_VECTORIZE_SU
  e8cd088... RISC-V: Fix dead loop for user vsetvli intrinsic avl checki
  e59e450... RISC-V: Factor out vector manager code in vsetvli insertion
  eab5094... RISC-V: Improve portability of testcases
  97aee38... RISC-V: Fix ugly && incorrect codes of RVV auto-vectorizati
  e802685... RISC-V: Handle multi-lib path correclty for linux
  cb9dbfb... Delete duplicated riscv definition.
  ea212e2... RISC-V: autovec: Verify that GET_MODE_NUNITS is a multiple 
  d2fb1f9... RISC-V:autovec: Add target vectorization hooks
  0bed18b... Remove duplicated definition in risc-v vector support.
  e565b2d... RISC-V:autovec: Add auto-vectorization support functions
  fa1931c... RISC-V: autovec: Export policy functions to global scope
  c8c183b... RISC-V: autovec: Add new predicates and function prototypes
  69e86ae... RISC-V: Enable basic RVV auto-vectorization support.
  5662f0c... RISC-V: Fix incorrect demand info merge in local vsetvli op
  3c65193... RISC-V: Legitimise the const0_rtx for RVV indexed load/stor
  1ed8be5... RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
  f40bbc2... RISC-V: Fix PR109615
  14bbca2... riscv: fix error: control reaches end of non-void function
  6528010... RISC-V: Support segment intrinsics
  6b7b603... RISC-V: Add tuple type vget/vset intrinsics
  2f357f9... RISC-V: Add tuple types support
  a702779... RISC-V: Table A.6 conformance tests
  50ece1b... RISC-V: Weaken atomic loads
  644e5b1... RISC-V: Weaken mem_thread_fence
  7855e7d... RISC-V: Weaken LR/SC pairs
  6065f5d... RISC-V: Eliminate AMO op fences
  a88931c... RISC-V: Strengthen atomic stores
  684c853... RISC-V: Add AMO release bits
  8471c4a... RISC-V: Enforce atomic compare_exchange SEQ_CST
  d0f9a96... RISC-V: Enforce subword atomic LR/SC SEQ_CST
  61f7026... RISC-V: Enforce Libatomic LR/SC SEQ_CST
  19abd10... RISC-V: Eliminate SYNC memory models
  0d17241... RISC-V: ICE for vlmul_ext_v intrinsic API
  0fa11fa... RISC-V: fix build issue with gcc 4.9.x
  bdda82b... RISC-V: decouple stack allocation for rv32e w/o save-restor
  1aec92a... RISC-V: Add divmod expansion support
  4e68ac6... RISC-V: Added support clmul[r,h] instructions for Zbc exten
  abef9a0... RISC-V: Eliminate redundant zero extension of minu/maxu ope
  4a37c04... RISC-V: Add required tls to read thread pointer test
  d8b048a... RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR
  6c31d5b... RISC-V: Legitimise the const0_rtx for RVV load/store addres
  8f7e874... RISC-V: Fine tune vmadc/vmsbc RA constraint
  b31b6ac... RISC-V: Optimize comparison patterns for register allocatio
  ef53646... RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codeg
  77e186f... RISC-V: Fine tune gather load RA constraint
  bba3b1d... RISC-V: Bugfix for RVV vbool*_t vn_reference_equal
  034f133... RISC-V: Add auto-vectorization compile option for RVV
  98134b3... avoid splitting small constants in bcrli_nottwobits pattern
  e432aaa... riscv: relax splitter restrictions for creating pseudos
  b6515a9... RISC-V: Eliminate redundant vsetvli for duplicate AVL def
  dc5fe00... RISC-V: Add function comment for cleanup_insns.
  564b624... RISC-V: Optimize fault only first load
  78cf6fd... RISC-V: Defer vsetvli insertion to later if possible [PR108
  62432db... riscv: Fix <bitmanip_insn> fallout.
  bc18f79... [PR target/108248] [RISC-V] Break down some bitmanip insn t
  acc2a8d... RISC-V: Fix RVV register order
  be9e153... RISC-V: Fix riscv/arch-19.c with different ISA spec version
  13cde74... RISC-V: Fix simplify_ior_optimization.c on rv32
  c475101... RISC-V: Support 128 bit vector chunk
  4bba7fb... RISC-V: Align IOR optimization MODE_CLASS condition to AND.
  ae1e204... vect: Verify that GET_MODE_UNITS is greater than one for ve
  0f3353b... Add TARGET_ZBKB to the condition of bswapsi2, bswapdi2 and 
  8235c50... RISC-V: Adjust the parsing order of extensions to be consis
  17d40dd... RISC-V: make the stack manipulation codes more readable.
  2da5252... RISC-V: optimize stack manipulation in save-restore
  1498f82... RISC-V: add a new parameter in riscv_first_stack_step.
  1c380fa... RISC-V: Optimze the reverse conditions of rotate shift
  27e4213... alpha: Fix computation mode in alpha_emit_set_long_cost [PR (*)
  04a3fa2... Daily bump. (*)
  db17977... libstdc++: Check conversion from filesystem::path to wide s (*)
  037907c... Initial Granite Rapids D Support (*)
  c158400... Daily bump. (*)
  3957319... ada: Follow-up fix for compilation issue with recent MinGW- (*)
  bb38d74... testsuite: Unbreak pr110557.cc where long is 32-bit (*)
  7f6d861... Daily bump. (*)
  1e6a948... vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [P (*)
  f9781fc... Daily bump. (*)
  35efeed... Daily bump. (*)
  d00a7d2... Fortran: simplification of FINDLOC for constant complex arg (*)
  2389447... doc: Fix typo in Warning Options [PR110595] (*)
  692c6b8... Daily bump. (*)
  acd679a... d: Fix PR 108842: Cannot use enum array with -fno-druntime (*)
  45e950b... tree-optimization/110556 - tail merging still pre-tuples (*)
  0d20f9d... tree-optimization/110515 - wrong code with LIM + PRE (*)
  980666f... tree-optimization/110392 - ICE with predicate analysis (*)
  32c7f05... tree-optimization/110381 - preserve SLP permutation with in (*)
  857d763... RISC-V: Fix local_eliminate_vsetvl_insn bug in VSETVL PASS[ (*)
  3074842... ada: Fix expanding container aggregates (*)
  b5cddeb... ada: Fix internal error on aggregate within container aggre (*)
  0fb227b... ada: Fix crash on vector initialization (*)
  4a158c0... Daily bump. (*)
  94d24f1... libstdc++: Document --enable-cstdio=stdio_pure [PR104299] (*)
  41d940c... Daily bump. (*)
  68aa17c... Fix power10 fusion bug with prefixed loads, PR target/10532 (*)
  5906d8f... rs6000: genfusion: Rewrite load/compare code (*)
  79b6a48... tree-optimization/110228 - avoid undefs in ifcombine more t (*)
  c7d995d... Daily bump. (*)
  e292632... x86: Enable ENQCMD and UINTR for march=sierraforest. (*)
  7a98514... Daily bump. (*)
  d4a9d4c... Fix couple of endianness issues in fold_ctor_reference (*)
  1289741... Darwin, Objective-C: Support -fconstant-cfstrings [PR108743 (*)
  50180d4... libphobos: Handle Darwin Arm and AArch64 in fibre context a (*)
  025a3f4... libphobos, testsuite: Disable forkgc2 on Darwin [PR103944] (*)
  e79c653... modula-2: Amend the handling of failed select() calls in RT (*)
  75909f6... Daily bump. (*)
  3cb9d1f... d: Fix testcase failure of gdc.dg/Wbuiltin_declaration_mism (*)
  f614e6b... d: Add testcase from PR108962 (*)
  78e9bd7... d: Fix core.volatile.volatileLoad discarded if result is un (*)
  6876e30... Daily bump. (*)
  3f43c19... d: Fix accesses of immutable arrays using constant index st (*)
  6e79091... d: Don't generate code that throws exceptions when compilin (*)
  23c6445... c++: NSDMI instantiation during overload resolution [PR1104 (*)
  8f2cafc... c++: unpropagated CONSTRUCTOR_MUTABLE_POISON [PR110463] (*)
  fdc22ac... Daily bump. (*)
  e2dd8e4... Daily bump. (*)
  b7b70cb... libstdc++: Fix configure test for 32-bit targets (*)
  fa78e9a... libstdc++: Disable embedded tzdata for all 16-bit targets (*)
  2d40cd2... libstdc++: Fix std::format for pointers [PR110239] (*)
  ae7cdc8... libstdc++: Fix P2510R3 "Formatting pointers" [PR110149] (*)
  dbd4acd... libstdc++: Disable cacheline alignment for DJGPP [PR109741] (*)
  132015b... libstdc++: Add preprocessor checks to <experimental/interne (*)
  aa08735... libstdc++: Fix some tests that fail with -fexcess-precision (*)
  4b05a7d... libstdc++: Add missing noexcept to std::scoped_allocator_ad (*)
  52997b1... libstdc++: Improve tests for emplace member of sequence con (*)
  adbb9c6... testsuite: Use -fno-report-bug in gcc.dg/plugin/ (*)
  483522d... i386: add -fno-stack-protector to two tests (*)
  74ef422... Fortran: fix passing of zero-sized array arguments to proce (*)
  1a023e6... testsuite: fix scan-tree-dump patterns [PR83904,PR100297] (*)
  8b05956... Refine maskstore patterns with UNSPEC_MASKMOV. (*)
  ecc1af1... Refine maskloadmn pattern with UNSPEC_MASKLOAD. (*)
  e0f07bc... Daily bump. (*)
  99c0b27... i386: Sync tune_string with arch_string for target attribut (*)
  f2eeda5... d: Fix wrong code-gen when returning structs by value. (*)
  09124b7... Support parallel testing in libgomp: fallback Perl 'flock'  (*)
  3840d5c... Support parallel testing in libgomp, part II [PR66005] (*)
  2aa6135... Support parallel testing in libgomp, part I [PR66005] (*)
  4b9af57... libgomp C++ testsuite: Use 'lang_include_flags' instead of  (*)
  70717f1... libgm2: Remove 'autogen.sh' (*)
  e0718f3... libgm2: Adjust 'autogen.sh' to 'ACLOCAL_AMFLAGS', and simpl (*)
  a533ded... rust: Update usage of TARGET_AIX to TARGET_AIX_OS (*)
  2183235... go: Update usage of TARGET_AIX to TARGET_AIX_OS (*)
  3be6813... Make option mvzeroupper independent of optimization level. (*)
  59c8233... Issue a warning for conversion between short and __bf16 und (*)
  74ae970... Daily bump. (*)
  81fa6df... Mark asm goto with outputs as volatile (*)
  7085905... ipa-sra: Disable candidates with no known callers (PR 11027 (*)
  2f3eedc... RISC-V: Fix VL operand bug in VSETVL PASS[PR110264] (*)
  87b1fcb... Fix __builtin_alloca_with_align_and_max defbuiltin usage (*)
  0354c7d... Daily bump. (*)
  9599da7... d: Suboptimal codegen for __builtin_expect(cond, false) (*)
  ae3a4ce... d: Fix crash in d/dmd/root/aav.d:127 dmd_aaGetRvalue from D (*)
  9d423de... Daily bump. (*)
  30b38d4... d: Merge upstream dmd, druntime a45f4e9f43, phobos 106038f2 (*)
  87f569b... Daily bump. (*)
  896085f... Daily bump. (*)
  9df1f36... compiler, libgo: support bootstrapping gc compiler (*)
  b7e9dd9... c++: fix PR110102 backport (*)
  be1e122... c++: init-list of uncopyable type [PR110102] (*)
  dc7f1bf... c++: fix explicit/copy problem [PR109247] (*)
  9da2ef3... tree-optimization/110298 - CFG cleanup and stale nb_iterati (*)
  0b69fea... debug/110295 - mixed up early/late debug for member DIEs (*)
  b0856bb... middle-end/110055 - avoid CLOBBERing static variables (*)
  a737da4... ipa/109983 - (IPA) PTA speedup (*)
  fd8fc2c... Daily bump. (*)
  d116ce7... Daily bump. (*)
  fedfab9... Daily bump. (*)
  4eb01f9... aarch64: Allow compiler to define ls64 builtins [PR110132] (*)
  9df688c... aarch64: Fix wrong code with st64b builtin [PR110100] (*)
  ff00fa1... aarch64: Fix whitespace in ls64 builtin implementation [PR1 (*)
  4ac89ab... runtime: use a C function to call mmap (*)
  4b4a21c... testsuite: Check int128 effective target for pr109932-{1,2} (*)
  4e67d73... rs6000: Guard __builtin_{un,}pack_vector_int128 with vsx [P (*)
  cefe925... rs6000: Don't use TFmode for 128 bits fp constant in toc [P (*)
  8bed121... Daily bump. (*)
  a5b089b... Daily bump. (*)
  7e178d0... Daily bump. (*)
  4ca87c8... Daily bump. (*)
  5568d22... RA: Constrain class of pic offset table pseudo to general r (*)
  0ba1be4... Daily bump. (*)
  3b66bec... ada: Fix internal error on loop iterator filter with -gnatV (*)
  f829733... LoongArch: Avoid non-returning indirect jumps through $ra [ (*)
  523dc26... Daily bump. (*)
  a79f49f... i386: Fix up whitespace in assembly (*)
  66f8f9b... Use x instead of v for alternative 2 (v, BH) in mov<mode>_i (*)
  0cdaf87... Daily bump. (*)
  09c6f00... Fix disambiguation against .MASK_LOAD (*)
  6955c36... Fix disambiguation against .MASK_STORE (*)
  5e5b66f... fix frange_nextafter odr violation (*)
  b69596f... Daily bump. (*)
  73ae34b... middle-end/110200 - genmatch force-leaf and convert interac (*)
  d67b4ec... Daily bump. (*)
  2bfa8b6... Daily bump. (*)
  6165b23... target/109650: Fix wrong code after cc0 -> CCmode transitio (*)
  d722a0f... Daily bump. (*)
  682bbd3... MATCH: Fix zero_one_valued_p not to match signed 1 bit inte (*)
  b6118b8... middle-end/110182 - TYPE_PRECISION on VECTOR_TYPE causes wr (*)
  46e585c... Darwin, PPC: Fix struct layout with pragma pack [PR110044]. (*)
  32c51d0... fortran: Fix ICE on pr96024.f90 on big-endian hosts [PR9602 (*)
  5e01a59... Explicitly view_convert_expr mask to signed type when foldi (*)
  b91956f... Daily bump. (*)
  8f17099... arm: PR target/109939 Correct signedness of return type of  (*)
  65ed436... Daily bump. (*)
  dda4745... rs6000: Remove duplicate expression [PR106907] (*)
  9868218... arm: Fix ICE due to infinite splitting [PR109800] (*)
  4513d0a... Daily bump. (*)
  ff58310... libstdc++: Do not use std::expected::value() in monadic ops (*)
  b14121a... libstdc++: Implement LWG 3877 for std::expected monadic ops (*)
  044ee48... Fix PR 110085: `make clean` in GCC directory on sh target c (*)
  c0a5790... libstdc++: Make std::filesystem::copy_file work for procfs  (*)
  bae27ba... libstdc++: Use close-on-exec for file descriptors in filesy (*)
  32f2b0f... libstdc++: Fix ambiguous expression in std::array<T, 0>::fr (*)
  ad12d81... libstdc++: Do not assume existence of char8_t codecvt facet (*)
  34c039c... Daily bump. (*)
  54422c7... d: Warn when declared size of a special enum does not match (*)
  3e8a0e5... Daily bump. (*)
  4397517... Daily bump. (*)
  bedb3eb... Fortran: fix diagnostics for SELECT RANK [PR100607] (*)
  7b21a74... fix radix sort on 32bit platforms [PR109670] (*)
  fd68f60... release the sorted FDE array when deregistering a frame [PR (*)
  f980418... Daily bump. (*)
  7cbaf2f... target/110088: Improve operation of l-reg with const after  (*)
  c3e954f... Daily bump. (*)
  099d469... libstdc++: Fix std::abs(__float128) for -NaN and -0.0 [PR10 (*)
  1952707... libstdc++: Remove test dependency on _GLIBCXX_USE_C99_STDIN (*)
  8c221f3... libstdc++: Remove test dependencies on _GLIBCXX_USE_C99_STD (*)
  cfaacee... libstdc++: Fix PSTL test that fails in C++20 (*)
  d50255d... libstdc++: Document removal of implicit allocator rebinding (*)
  8105905... libstdc++: Fix -Wnonnull warnings during configure (*)
  2162c20... libstdc++: Require tzdb support for chrono::zoned_time prin (*)
  b05b8c9... libstdc++: Fix <chrono> pretty printers and add tests (*)
  3b95319... doc: Fix description of x86 -m32 option [PR109954] (*)
  ab72fb4... Daily bump. (*)
  c9e208b... Daily bump. (*)
  7d92616... [libstdc++] [testsuite] xfail double-prec from_chars for x8 (*)
  becd679... testsuite: make mve_intrinsic_type_overloads-int.c libc-agn (*)
  717a14e... libstdc++: Correct NTTP and simd_mask ctor call (*)
  3f90a56... libstdc++: Simplify calculation of expected value in simd t (*)
  f51bb83... libstdc++: Fix test assumptions on long and long double (*)
  15aca2c... libstdc++: Resolve -Wsign-compare issue (*)
  acf4fac... riscv: update riscv_asan_shadow_offset (*)
  8f1e18c... Daily bump. (*)
  965c447... Daily bump. (*)
  98fc9d3... RISC-V: Add local user vsetvl instruction elimination [PR10 (*)
  554aabc... RISC-V: Fix wrong select_kind in riscv_compute_multilib (*)
  49d596e... RISC-V: Suppress unused parameter warning in riscv-common.c (*)
  6f0eb99... RISC-V: Handle multi-lib path correclty for linux (*)
  b5e2477... RISC-V: Fix ternary instruction attribute bug (*)
  4e32d93... Daily bump. (*)
  dd4854f... Daily bump. (*)
  845135f... Daily bump. (*)

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