[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] Add bext pattern for ZBS

[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] Add bext pattern for ZBS

[Jeff Law]

https://gcc.gnu.org/g:1c750a5f4243e26e454bc315ee9b22e745130a1e

commit 1c750a5f4243e26e454bc315ee9b22e745130a1e
Author: Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
Date:   Fri May 19 21:41:12 2023 -0600

    Add bext pattern for ZBS
    
    Changes since v1:
            - Removed name clash change.
            - Fix new pattern indentation.
    
    -- >8 --
    
    When (a & (1 << bit_no)) is tested inside an IF we can use a bit extract.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
    
    gcc/testsuite/ChangeLog:
            * gcc.target/riscv/zbs-bext-02.c: New test.

Diff:
---
 gcc/config/riscv/bitmanip.md                 | 23 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/zbs-bext-02.c | 18 ++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c2a29e18174..96d31d92670 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -767,6 +767,29 @@
    operands[9] = GEN_INT (clearbit);
 })
 
+;; IF_THEN_ELSE: test for (a & (1 << BIT_NO))
+(define_insn_and_split "*branch<X:mode>_bext"
+  [(set (pc)
+	(if_then_else
+	  (match_operator 1 "equality_operator"
+         [(zero_extract:X (match_operand:X 2 "register_operand" "r")
+                          (const_int 1)
+                          (zero_extend:X
+                            (match_operand:QI 3 "register_operand" "r")))
+	    (const_int 0)])
+	(label_ref (match_operand 0 "" ""))
+	(pc)))
+  (clobber (match_scratch:X 4 "=&r"))]
+  "TARGET_ZBS"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 4) (zero_extract:X (match_dup 2)
+					(const_int 1)
+					(zero_extend:X (match_dup 3))))
+   (set (pc) (if_then_else (match_op_dup 1 [(match_dup 4) (const_int 0)])
+			   (label_ref (match_dup 0))
+			   (pc)))])
+
 ;; ZBKC or ZBC extension
 (define_insn "riscv_clmul_<mode>"
   [(set (match_operand:X 0 "register_operand" "=r")
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
new file mode 100644
index 00000000000..3f3b8404eca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-funroll-loops" } } */
+
+int
+foo(const long long B, int a)
+{
+  long long b = 1;    
+  for (int sq = 0; sq < 64; sq++)
+    if (B & (b << sq)) 
+      a++;
+
+  return a;
+}
+
+/* { dg-final { scan-assembler-times "bext\t" 1 } } */
+/* { dg-final { scan-assembler-not "bset" } } */
+/* { dg-final { scan-assembler-not "and" } } */

[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] Add bext pattern for ZBS

[Jeff Law]

https://gcc.gnu.org/g:7cc982b58675ffaecd478beda95cf9a340e5a317

commit 7cc982b58675ffaecd478beda95cf9a340e5a317
Author: Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
Date:   Fri May 19 21:41:12 2023 -0600

    Add bext pattern for ZBS
    
    Changes since v1:
            - Removed name clash change.
            - Fix new pattern indentation.
    
    -- >8 --
    
    When (a & (1 << bit_no)) is tested inside an IF we can use a bit extract.
    
    gcc/ChangeLog:
    
            * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
    
    gcc/testsuite/ChangeLog:
            * gcc.target/riscv/zbs-bext-02.c: New test.

Diff:
---
 gcc/config/riscv/bitmanip.md                 | 23 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/riscv/zbs-bext-02.c | 18 ++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index c2a29e18174..96d31d92670 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -767,6 +767,29 @@
    operands[9] = GEN_INT (clearbit);
 })
 
+;; IF_THEN_ELSE: test for (a & (1 << BIT_NO))
+(define_insn_and_split "*branch<X:mode>_bext"
+  [(set (pc)
+	(if_then_else
+	  (match_operator 1 "equality_operator"
+         [(zero_extract:X (match_operand:X 2 "register_operand" "r")
+                          (const_int 1)
+                          (zero_extend:X
+                            (match_operand:QI 3 "register_operand" "r")))
+	    (const_int 0)])
+	(label_ref (match_operand 0 "" ""))
+	(pc)))
+  (clobber (match_scratch:X 4 "=&r"))]
+  "TARGET_ZBS"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 4) (zero_extract:X (match_dup 2)
+					(const_int 1)
+					(zero_extend:X (match_dup 3))))
+   (set (pc) (if_then_else (match_op_dup 1 [(match_dup 4) (const_int 0)])
+			   (label_ref (match_dup 0))
+			   (pc)))])
+
 ;; ZBKC or ZBC extension
 (define_insn "riscv_clmul_<mode>"
   [(set (match_operand:X 0 "register_operand" "=r")
diff --git a/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
new file mode 100644
index 00000000000..3f3b8404eca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/zbs-bext-02.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_zbs -mabi=lp64" } */
+/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" "-funroll-loops" } } */
+
+int
+foo(const long long B, int a)
+{
+  long long b = 1;    
+  for (int sq = 0; sq < 64; sq++)
+    if (B & (b << sq)) 
+      a++;
+
+  return a;
+}
+
+/* { dg-final { scan-assembler-times "bext\t" 1 } } */
+/* { dg-final { scan-assembler-not "bset" } } */
+/* { dg-final { scan-assembler-not "and" } } */