From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 2119) id 3DE123858280; Fri, 14 Jul 2023 02:45:23 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3DE123858280 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1689302723; bh=KRnI8rXmFZQfOw7GskKgYTNxwICd8FbGMgADiRQJAdo=; h=From:To:Subject:Date:From; b=U3OBgANVrwD/SEVVQuIphIK2+vTq2PGDCkjXm2GC1/F2vZm0TxHlCpjN7jD/XcqxT XPFc9xJv3JPNDcVqUwhLTplACrDbpsif3DrVM2t+DDdaWctj/978KOV2JcDjye/xv8 ZIgWUoaAA1glURh32EJKMginoiuHigVlfnjMHztU= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit From: Jeff Law To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix one potential test failure for RVV vsetvl X-Act-Checkin: gcc X-Git-Author: Pan Li X-Git-Refname: refs/vendors/riscv/heads/gcc-13-with-riscv-opts X-Git-Oldrev: c23ecb3c5441c9a8c9658bd7d83dc0715c1ec14f X-Git-Newrev: 285c0cf4809553e65643d2adce69cae21d10cc52 Message-Id: <20230714024523.3DE123858280@sourceware.org> Date: Fri, 14 Jul 2023 02:45:23 +0000 (GMT) List-Id: https://gcc.gnu.org/g:285c0cf4809553e65643d2adce69cae21d10cc52 commit 285c0cf4809553e65643d2adce69cae21d10cc52 Author: Pan Li Date: Mon Jun 12 20:07:24 2023 +0800 RISC-V: Fix one potential test failure for RVV vsetvl The test will fail on below command with multi-thread like below. However, it comes from one missed "Oz" option when check vsetvl. make -j $(nproc) report RUNTESTFLAGS="rvv.exp riscv.exp" To some reason, this failure cannot be reproduced by RUNTESTFLAGS="rvv.exp" or make without -j option. We would like to fix it and root cause the reason later. Signed-off-by: Pan Li gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/vsetvl-23.c: Adjust test checking. Diff: --- gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c index 66c90ac10e7..f3420be8ab6 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-23.c @@ -34,4 +34,4 @@ void f(int8_t *base, int8_t *out, size_t vl, size_t m, size_t k) { /* { dg-final { scan-assembler-times {slli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*4} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ /* { dg-final { scan-assembler-times {srli\s+[a-x0-9]+,\s*[a-x0-9]+,\s*8} 1 { target { no-opts "-O0" no-opts "-g" no-opts "-funroll-loops" } } } } */ /* { dg-final { scan-assembler-times {vsetvli} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */ -/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-g" no-opts "-funroll-loops" } } } } */ +/* { dg-final { scan-assembler-times {vsetvli\s+zero,\s*[a-x0-9]+,\s*e8,\s*mf8,\s*tu,\s*m[au]} 5 { target { no-opts "-O0" no-opts "-Os" no-opts "-Oz" no-opts "-g" no-opts "-funroll-loops" } } } } */