[gcc r13-7598] Daily bump.

[gcc r13-7598] Daily bump.

[GCC Administrator]

https://gcc.gnu.org/g:3e95997a8dc905f0ac3a4243fb9dbf18dc70853b

commit r13-7598-g3e95997a8dc905f0ac3a4243fb9dbf18dc70853b
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Fri Jul 21 00:21:12 2023 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 42 ++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 19 +++++++++++++++++++
 3 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c805c6d1b40..271584bcd93 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,45 @@
+2023-07-20  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	* config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
+	dependency.
+	* config/aarch64/arm_acle.h: Remove unnecessary armv8.x
+	dependencies from target pragmas.
+	* config/aarch64/arm_fp16.h (target): Likewise.
+	* config/aarch64/arm_neon.h (target): Likewise.
+
+2023-07-20  Richard Biener  <rguenther@suse.de>
+
+	Revert:
+	2022-08-09  Roger Sayle  <roger@nextmovesoftware.com>
+
+	* config/i386/i386-features.cc (scalar_chain::convert_compare):
+	Create new pseudos only when/if needed.  Add support for TEST,
+	i.e. (COMPARE (AND x y) (const_int 0)), using UNSPEC_PTEST.
+	When broadcasting V2DImode and V4SImode use new pseudo register.
+	(timode_scalar_chain::convert_op): Do nothing if operand is
+	already V1TImode.  Avoid generating useless SUBREG conversions,
+	i.e. (SUBREG:V1TImode (REG:V1TImode) 0).  Handle CONST_WIDE_INT
+	in addition to CONST_INT by using CONST_SCALAR_INT_P.
+	(convertible_comparison_p): Use CONST_SCALAR_INT_P to match both
+	CONST_WIDE_INT and CONST_INT.  Recognize new *testti_doubleword
+	pattern as an STV candidate.
+	(timode_scalar_to_vector_candidate_p): Allow CONST_SCALAR_INT_P
+	operands in binary logic operations.
+	* config/i386/i386.cc (ix86_rtx_costs) <case UNSPEC>: Add costs
+	for UNSPEC_PTEST; a PTEST that performs an AND has the same cost
+	as regular PTEST, i.e. cost->sse_op.
+	* config/i386/i386.md (*testti_doubleword): New pre-reload
+	define_insn_and_split that recognizes comparison of TI mode AND
+	against zero.
+	* config/i386/sse.md (*ptest<mode>_and): New pre-reload
+	define_insn_and_split that recognizes UNSPEC_PTEST of identical
+	AND operands.
+
+2023-07-20  Haochen Jiang  <haochen.jiang@intel.com>
+
+	* doc/invoke.texi: Remove AVX512VP2INTERSECT in
+	Granite Rapids{, D} from documentation.
+
 2023-07-19  Jakub Jelinek  <jakub@redhat.com>
 
 	Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 4b8414aa23f..0e7d73c1914 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230720
+20230721
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2046b8586e9..aa1b5c3024f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,22 @@
+2023-07-20  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	* gcc.target/aarch64/feature-bf16-backport.c: New test.
+	* gcc.target/aarch64/feature-dotprod-backport.c: New test.
+	* gcc.target/aarch64/feature-fp16-backport.c: New test.
+	* gcc.target/aarch64/feature-fp16-scalar-backport.c: New test.
+	* gcc.target/aarch64/feature-fp16fml-backport.c: New test.
+	* gcc.target/aarch64/feature-i8mm-backport.c: New test.
+	* gcc.target/aarch64/feature-memtag-backport.c: New test.
+	* gcc.target/aarch64/feature-sha3-backport.c: New test.
+	* gcc.target/aarch64/feature-sm4-backport.c: New test.
+
+2023-07-20  Richard Biener  <rguenther@suse.de>
+
+	Revert:
+	2023-07-20  Roger Sayle  <roger@nextmovesoftware.com>
+
+	* gcc.target/i386/sse4_1-stv-8.c: New test case.
+
 2023-07-19  Patrick Palka  <ppalka@redhat.com>
 
 	Backported from master: