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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix RVV frm run test failure on RV32
@ 2023-07-25 18:32 Jeff Law
0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-07-25 18:32 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:4e07c1fc887a1a3379b57795d0c5212e85177c1d
commit 4e07c1fc887a1a3379b57795d0c5212e85177c1d
Author: Pan Li <pan2.li@intel.com>
Date: Tue Jul 18 10:45:27 2023 +0800
RISC-V: Fix RVV frm run test failure on RV32
Refine the run test case to avoid interactive checking in RV32, by
separating each checks in different functions.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-frm-run-1.c: Fix run failure.
(cherry picked from commit 61ec6a45ae3bb741b3afef41cef01094930adf7f)
Diff:
---
.../riscv/rvv/base/float-point-frm-run-1.c | 59 +++++++++++++---------
1 file changed, 36 insertions(+), 23 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
index 245ce7d1fc0..1b2789a924b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/base/float-point-frm-run-1.c
@@ -5,6 +5,24 @@
#include <stdio.h>
#include <stdint-gcc.h>
+#define DEFINE_TEST_FUNC(FRM) \
+vfloat32m1_t __attribute__ ((noinline)) \
+test_float_point_frm_run_##FRM (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl) \
+{ \
+ vfloat32m1_t result; \
+ \
+ set_frm (0); \
+ \
+ result = __riscv_vfadd_vv_f32m1_rm (op1, result, FRM, vl); \
+ \
+ assert_equal (FRM, get_frm (), "The value of frm should be " #FRM "."); \
+ \
+ return result; \
+}
+
+#define RUN_TEST_FUNC(FRM, op1, op2, vl) \
+ test_float_point_frm_run_##FRM (op1, op2, vl)
+
static int
get_frm ()
{
@@ -41,28 +59,11 @@ assert_equal (int a, int b, char *message)
}
}
-vfloat32m1_t __attribute__ ((noinline))
-test_float_point_frm_run (vfloat32m1_t op1, vfloat32m1_t op2, size_t vl)
-{
- vfloat32m1_t result;
-
- result = __riscv_vfadd_vv_f32m1_rm (op1, result, 1, vl);
- assert_equal (1, get_frm (), "The value of frm register should be 1.");
-
- result = __riscv_vfadd_vv_f32m1_rm (op1, result, 2, vl);
- assert_equal (2, get_frm (), "The value of frm register should be 2.");
-
- result = __riscv_vfadd_vv_f32m1_rm (op1, result, 3, vl);
- assert_equal (3, get_frm (), "The value of frm register should be 3.");
-
- result = __riscv_vfadd_vv_f32m1_rm (op1, result, 4, vl);
- assert_equal (4, get_frm (), "The value of frm register should be 4.");
-
- result = __riscv_vfadd_vv_f32m1_rm (op1, result, 0, vl);
- assert_equal (0, get_frm (), "The value of frm register should be 0.");
-
- return result;
-}
+DEFINE_TEST_FUNC (0)
+DEFINE_TEST_FUNC (1)
+DEFINE_TEST_FUNC (2)
+DEFINE_TEST_FUNC (3)
+DEFINE_TEST_FUNC (4)
int
main ()
@@ -72,8 +73,20 @@ main ()
vfloat32m1_t op2;
set_frm (4);
- test_float_point_frm_run (op1, op2, vl);
+ RUN_TEST_FUNC (0, op1, op2, vl);
+ assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+ RUN_TEST_FUNC (1, op1, op2, vl);
+ assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+ RUN_TEST_FUNC (2, op1, op2, vl);
+ assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+ RUN_TEST_FUNC (3, op1, op2, vl);
+ assert_equal (4, get_frm (), "The value of frm register should be 4.");
+
+ RUN_TEST_FUNC (4, op1, op2, vl);
assert_equal (4, get_frm (), "The value of frm register should be 4.");
return 0;
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