public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc(refs/users/meissner/heads/work130-vpair)] Update vector pair documentation; Add get vector built-in.
@ 2023-08-04 23:24 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2023-08-04 23:24 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f434b4f7849df876c286bb03f162a3ee11a30c55
commit f434b4f7849df876c286bb03f162a3ee11a30c55
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Aug 4 19:24:29 2023 -0400
Update vector pair documentation; Add get vector built-in.
2023-08-04 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def (__builtin_vpair_*_get_vector): Add
built-ins.
* config/rs6000/vector-pair.md (VPAIR_FP): Rename from VPAIR_FP_WRAPPER.
(VPAIR_INT): Rename from VPAIR_INT_WRAPPER.
(VPAIR_ALL): New int iterator.
(vpair_get_vector_<vpair_type>): New insns.
(vpair_*): Rename VPAIR_FP_WRAPPER to VPAIR_FP. Rename
VPAIR_INT_WRAPPER to VPAIR_INT.
* doc/extend.texi (PowerPC Built-in Functions): Move where vector pair
built-ins are documented. Document __builtin_vpair_*_get_vector.
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 30 ++++++++++
gcc/config/rs6000/vector-pair.md | 106 ++++++++++++++++++++--------------
gcc/doc/extend.texi | 12 +++-
3 files changed, 105 insertions(+), 43 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index a779e4866c2..25f4a947577 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -4122,6 +4122,9 @@
v256 __builtin_vpair_zero ();
VPAIR_ZERO vpair_zero {mma}
+ vf __builtin_vpair_f32_get_vector (v256, const int);
+ VPAIR_F32_GET_VECTOR vpair_get_vector_v8sf {mma}
+
v256 __builtin_vpair_f32_abs (v256);
VPAIR_F32_ABS vpair_abs_v8sf2 {mma}
@@ -4149,6 +4152,9 @@
float __builtin_vpair_f32_add_elements (v256);
VPAIR_F32_ADD_ELEMENTS vpair_reduc_plus_scale_v8sf {mma}
+ vd __builtin_vpair_f64_get_vector (v256, const int);
+ VPAIR_F64_GET_VECTOR vpair_get_vector_v4df {mma}
+
v256 __builtin_vpair_f64_abs (v256);
VPAIR_F64_ABS vpair_abs_v4df2 {mma}
@@ -4176,6 +4182,12 @@
double __builtin_vpair_f64_add_elements (v256);
VPAIR_F64_ADD_ELEMENTS vpair_reduc_plus_scale_v4df {mma}
+ vuc __builtin_vpair_i8u_get_vector (v256, const int);
+ VPAIR_I8U_GET_VECTOR vpair_get_vector_v32qi {mma}
+
+ vsc __builtin_vpair_i8_get_vector (v256, const int);
+ VPAIR_I8_GET_VECTOR vpair_get_vector_v32qi {mma}
+
v256 __builtin_vpair_i8_add (v256, v256);
VPAIR_I8_ADD vpair_add_v32qi3 {mma}
@@ -4209,6 +4221,12 @@
v256 __builtin_vpair_i8_xor (v256, v256);
VPAIR_I8_XOR vpair_xor_v32qi3 {mma}
+ vus __builtin_vpair_i16u_get_vector (v256, const int);
+ VPAIR_I16U_GET_VECTOR vpair_get_vector_v16hi {mma}
+
+ vss __builtin_vpair_i16_get_vector (v256, const int);
+ VPAIR_I16_GET_VECTOR vpair_get_vector_v16hi {mma}
+
v256 __builtin_vpair_i16_add (v256, v256);
VPAIR_I16_ADD vpair_add_v16hi3 {mma}
@@ -4242,6 +4260,12 @@
v256 __builtin_vpair_i16_xor (v256, v256);
VPAIR_I16_XOR vpair_xor_v16hi3 {mma}
+ vui __builtin_vpair_i32u_get_vector (v256, const int);
+ VPAIR_I32U_GET_VECTOR vpair_get_vector_v8si {mma}
+
+ vsi __builtin_vpair_i32_get_vector (v256, const int);
+ VPAIR_I32_GET_VECTOR vpair_get_vector_v8si {mma}
+
v256 __builtin_vpair_i32_add (v256, v256);
VPAIR_I32_ADD vpair_add_v8si3 {mma}
@@ -4275,6 +4299,12 @@
v256 __builtin_vpair_i32_xor (v256, v256);
VPAIR_I32_XOR vpair_xor_v8si3 {mma}
+ vull __builtin_vpair_i64u_get_vector (v256, const int);
+ VPAIR_I64U_GET_VECTOR vpair_get_vector_v4di {mma}
+
+ vsll __builtin_vpair_i64_get_vector (v256, const int);
+ VPAIR_I64_GET_VECTOR vpair_get_vector_v4di {mma}
+
v256 __builtin_vpair_i64_add (v256, v256);
VPAIR_I64_ADD vpair_add_v4di3 {mma}
diff --git a/gcc/config/rs6000/vector-pair.md b/gcc/config/rs6000/vector-pair.md
index 0c3afd049a4..0fdd1292966 100644
--- a/gcc/config/rs6000/vector-pair.md
+++ b/gcc/config/rs6000/vector-pair.md
@@ -87,17 +87,23 @@
(umin "altivec_register_operand")
(xor "vsx_register_operand")])
-;; Iterator for creating the wrappers for vector pair built-ins
-(define_int_iterator VPAIR_FP_WRAPPER [UNSPEC_VPAIR_V4DF
- UNSPEC_VPAIR_V8SF])
-
-(define_int_iterator VPAIR_INT_WRAPPER [UNSPEC_VPAIR_V4DI
- UNSPEC_VPAIR_V8SI
- UNSPEC_VPAIR_V16HI
- UNSPEC_VPAIR_V32QI])
-
-;; Map VPAIR_{INT,FP}_WRAPPER to vector the type of the arguments after they
-;; are split
+;; Iterator for creating the unspecs for vector pair built-ins
+(define_int_iterator VPAIR_FP [UNSPEC_VPAIR_V4DF
+ UNSPEC_VPAIR_V8SF])
+
+(define_int_iterator VPAIR_INT [UNSPEC_VPAIR_V4DI
+ UNSPEC_VPAIR_V8SI
+ UNSPEC_VPAIR_V16HI
+ UNSPEC_VPAIR_V32QI])
+
+(define_int_iterator VPAIR_ALL [UNSPEC_VPAIR_V4DF
+ UNSPEC_VPAIR_V8SF
+ UNSPEC_VPAIR_V4DI
+ UNSPEC_VPAIR_V8SI
+ UNSPEC_VPAIR_V16HI
+ UNSPEC_VPAIR_V32QI])
+
+;; Map VPAIR_{INT,FP,ALL} to vector type of the arguments after they are split
(define_int_attr VPAIR_VECTOR [(UNSPEC_VPAIR_V4DF "V2DF")
(UNSPEC_VPAIR_V8SF "V4SF")
(UNSPEC_VPAIR_V32QI "V16QI")
@@ -105,7 +111,7 @@
(UNSPEC_VPAIR_V8SI "V4SI")
(UNSPEC_VPAIR_V4DI "V2DI")])
-;; Map VPAIR_{INT,FP}_WRAPPER to a lower case name to identify the vector pair.
+;; Map VPAIR_{INT,FP,ALL} to a lower case name to identify the vector pair.
(define_int_attr vpair_type [(UNSPEC_VPAIR_V4DF "v4df")
(UNSPEC_VPAIR_V8SF "v8sf")
(UNSPEC_VPAIR_V32QI "v32qi")
@@ -113,7 +119,7 @@
(UNSPEC_VPAIR_V8SI "v8si")
(UNSPEC_VPAIR_V4DI "v4di")])
-;; Map VPAIR_INT_WRAPPER to constraints used for the negate scratch register.
+;; Map VPAIR_INT to constraints used for the negate scratch register.
(define_int_attr vpair_neg_reg [(UNSPEC_VPAIR_V32QI "&v")
(UNSPEC_VPAIR_V16HI "&v")
(UNSPEC_VPAIR_V8SI "X")
@@ -138,13 +144,29 @@
}
[(set_attr "length" "8")])
+;; Extract one of the two 128-bitvectors from a vector pair.
+(define_insn_and_split "vpair_get_vector_<vpair_type>"
+ [(set (match_operand:<VPAIR_VECTOR> 0 "vsx_register_operand" "=wa")
+ (unspec:<VPAIR_VECTOR>
+ [(match_operand:OO 1 "vsx_register_operand" "wa")
+ (match_operand 2 "const_0_to_1_operand" "n")]
+ VPAIR_ALL))]
+ "TARGET_MMA"
+ "#"
+ "&& reload_completed"
+ [(set (match_dup 0) (match_dup 3))]
+{
+ unsigned reg1 = reg_or_subregno (operands[1]);
+ operands[3] = gen_rtx_REG (<VPAIR_VECTOR>mode, reg1 + INTVAL (operands[2]));
+})
+
\f
;; Vector pair floating point unary operations
(define_insn_and_split "vpair_<vpair_op>_<vpair_type>2"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa")
(unspec:OO [(VPAIR_FP_UNARY:OO
(match_operand:OO 1 "vsx_register_operand" "wa"))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -169,8 +191,8 @@
[(neg:OO
(unspec:OO
[(abs:OO (match_operand:OO 1 "vsx_register_operand" "ww"))]
- VPAIR_FP_WRAPPER))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -198,7 +220,7 @@
(unspec:OO [(VPAIR_FP_BINARY:OO
(match_operand:OO 1 "vsx_register_operand" "wa")
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -232,7 +254,7 @@
(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
(match_operand:OO 2 "vsx_register_operand" "wa,0")
(match_operand:OO 3 "vsx_register_operand" "0,wa"))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -271,8 +293,8 @@
(match_operand:OO 2 "vsx_register_operand" "wa,0")
(unspec:OO
[(neg:OO (match_operand:OO 3 "vsx_register_operand" "0,wa"))]
- VPAIR_FP_WRAPPER))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -312,8 +334,8 @@
(match_operand:OO 1 "vsx_register_operand" "%wa,wa")
(match_operand:OO 2 "vsx_register_operand" "wa,0")
(match_operand:OO 3 "vsx_register_operand" "0,wa"))]
- VPAIR_FP_WRAPPER))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -356,9 +378,9 @@
(match_operand:OO 2 "vsx_register_operand" "wa,0")
(unspec:OO
[(neg:OO (match_operand:OO 3 "vsx_register_operand" "0,wa"))]
- VPAIR_FP_WRAPPER))]
- VPAIR_FP_WRAPPER))]
- VPAIR_FP_WRAPPER))]
+ VPAIR_FP))]
+ VPAIR_FP))]
+ VPAIR_FP))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -456,7 +478,7 @@
[(set (match_operand:OO 0 "altivec_register_operand" "=v")
(unspec:OO [(neg:OO
(match_operand:OO 1 "altivec_register_operand" "v"))]
- VPAIR_INT_WRAPPER))
+ VPAIR_INT))
(clobber (match_scratch:<VPAIR_VECTOR> 2 "=<vpair_neg_reg>"))]
"TARGET_MMA"
"#"
@@ -500,7 +522,7 @@
(define_insn_and_split "vpair_not_<vpair_type>2"
[(set (match_operand:OO 0 "vsx_register_operand" "=wa")
(unspec:OO [(not:OO (match_operand:OO 1 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -525,7 +547,7 @@
(unspec:OO [(VPAIR_INT_BINARY:OO
(match_operand:OO 1 "<vpair_ipred>" "<vpair_ireg>")
(match_operand:OO 2 "<vpair_ipred>" "<vpair_ireg>"))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -558,9 +580,9 @@
(unspec:OO
[(not:OO
(match_operand:OO 1 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER)
+ VPAIR_INT)
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -593,9 +615,9 @@
(unspec:OO
[(not:OO
(match_operand:OO 1 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER)
+ VPAIR_INT)
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -629,8 +651,8 @@
(unspec:OO [(and:OO
(match_operand:OO 1 "vsx_register_operand" "wa")
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -662,11 +684,11 @@
[(ior:OO
(unspec:OO [(not:OO
(match_operand:OO 1 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER)
+ VPAIR_INT)
(unspec:OO [(not:OO
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -700,8 +722,8 @@
(unspec:OO [(ior:OO
(match_operand:OO 1 "vsx_register_operand" "wa")
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
@@ -733,11 +755,11 @@
[(ior:OO
(unspec:OO [(not:OO
(match_operand:OO 1 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER)
+ VPAIR_INT)
(unspec:OO [(not:OO
(match_operand:OO 2 "vsx_register_operand" "wa"))]
- VPAIR_INT_WRAPPER))]
- VPAIR_INT_WRAPPER))]
+ VPAIR_INT))]
+ VPAIR_INT))]
"TARGET_MMA"
"#"
"&& reload_completed"
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index c3501f06572..24de511fe46 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -14865,6 +14865,7 @@ instructions, but allow the compiler to schedule those calls.
* NDS32 Built-in Functions::
* Nvidia PTX Built-in Functions::
* Basic PowerPC Built-in Functions::
+* PowerPC Vector Pair Built-in Functions Available on ISA 3.1::
* PowerPC AltiVec/VSX Built-in Functions::
* PowerPC Hardware Transactional Memory Built-in Functions::
* PowerPC Atomic Memory Operation Functions::
@@ -19150,7 +19151,6 @@ The PVIPR documents the following overloaded functions:
* PowerPC AltiVec Built-in Functions Available on ISA 2.07::
* PowerPC AltiVec Built-in Functions Available on ISA 3.0::
* PowerPC AltiVec Built-in Functions Available on ISA 3.1::
-* PowerPC Vector Pair Built-in Functions Available on ISA 3.1::
@end menu
@node PowerPC AltiVec Built-in Functions on ISA 2.05
@@ -21126,6 +21126,7 @@ The following built-in functions operate on pairs of
@code{vector float} values:
@smallexample
+vector float __builtin_vpair_f32_get_vector (__vector_pair, int);
__vector_pair __builtin_vpair_f32_abs (__vector_pair);
__vector_pair __builtin_vpair_f32_add (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_f32_fma (__vector_pair, __vector_pair, __vector_pair);
@@ -21141,6 +21142,7 @@ The following built-in functions operate on pairs of
@code{vector double} values:
@smallexample
+vector double __builtin_vpair_f64_get_vector (__vector_pair, int);
__vector_pair __builtin_vpair_f64_abs (__vector_pair);
__vector_pair __builtin_vpair_f64_add (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_f64_fma (__vector_pair, __vector_pair, __vector_pair);
@@ -21156,6 +21158,8 @@ The following built-in functions operate on pairs of
@code{vector long long} or @code{vector unsigned long long} values:
@smallexample
+vector long long __builtin_vpair_i64_get_vector (__vector_pair, int);
+vector unsigned long long __builtin_vpair_i64u_get_vector (__vector_pair, int);
__vector_pair __builtin_vpair_i64_add (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i64_and (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i64_ior (__vector_pair, __vector_pair);
@@ -21174,6 +21178,8 @@ The following built-in functions operate on pairs of
@code{vector int} or @code{vector unsigned int} values:
@smallexample
+vector int __builtin_vpair_i32_get_vector (__vector_pair, int);
+vector unsigned int __builtin_vpair_i32u_get_vector (__vector_pair, int);
__vector_pair __builtin_vpair_i32_add (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i32_and (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i32_ior (__vector_pair, __vector_pair);
@@ -21191,6 +21197,8 @@ The following built-in functions operate on pairs of
@code{vector short} or @code{vector unsigned short} values:
@smallexample
+vector short __builtin_vpair_i16_get_vector (__vector_pair, int);
+vector unsigned short __builtin_vpair_i16u_get_vector (__vector_pair, int);
__vector_pair __builtin_vpair_i16_add (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i16_and (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i16_ior (__vector_pair, __vector_pair);
@@ -21208,6 +21216,8 @@ The following built-in functions operate on pairs of
@code{vector signed char} or @code{vector unsigned char} values:
@smallexample
+vector signed char __builtin_vpair_i8_get_vector (__vector_pair, int);
+vector unsigned char __builtin_vpair_i8u_get_vector (__vector_pair, int);
__vector_pair __builtin_vpair_i8_add (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i8_and (__vector_pair, __vector_pair);
__vector_pair __builtin_vpair_i8_ior (__vector_pair, __vector_pair);
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2023-08-04 23:24 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-08-04 23:24 [gcc(refs/users/meissner/heads/work130-vpair)] Update vector pair documentation; Add get vector built-in Michael Meissner
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).