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From: Lehua Ding <lhtin@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc r14-3027] tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64
Date: Mon,  7 Aug 2023 10:15:34 +0000 (GMT)	[thread overview]
Message-ID: <20230807101534.EE6083858412@sourceware.org> (raw)

https://gcc.gnu.org/g:c5f673dbc252e35e6b66e9b8abd30a4027193e0b

commit r14-3027-gc5f673dbc252e35e6b66e9b8abd30a4027193e0b
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Mon Aug 7 09:54:31 2023 +0800

    tree-optimization/110897 - Fix missed vectorization of shift on both RISC-V and aarch64
    
    Consider this following case:
    
    #include <stdint.h>
    
    #define TEST2_TYPE(TYPE)                                        \
      __attribute__((noipa))                                        \
      void vshiftr_##TYPE (TYPE *__restrict dst, TYPE *__restrict a, TYPE *__restrict b, int n)     \
      {                                                             \
        for (int i = 0; i < n; i++)                                 \
          dst[i] = (a[i]) >> b[i];                                  \
      }
    
    #define TEST_ALL()      \
     TEST2_TYPE(uint8_t)    \
     TEST2_TYPE(uint16_t)   \
     TEST2_TYPE(uint32_t)   \
     TEST2_TYPE(uint64_t)   \
    
    TEST_ALL()
    
    Both RISC-V and aarch64 of trunk GCC failed vectorize uint8_t/uint16_t with following missed report:
    
    <source>:17:1: missed: couldn't vectorize loop
    <source>:17:1: missed: not vectorized: relevant stmt not supported: patt_46 = MIN_EXPR <_6, 7>;
    <source>:17:1: missed: couldn't vectorize loop
    <source>:17:1: missed: not vectorized: relevant stmt not supported: patt_47 = MIN_EXPR <_7, 15>;
    Compiler returned: 0
    
    Both GCC 13.1 can vectorize, see:
    
    https://godbolt.org/z/6vaMK5M1o
    
    Bootstrap and regression on X86 passed.
    
    Ok for trunk ?
    
    gcc/ChangeLog:
    
            * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/autovec/binop/narrow-1.c: Adapt testcase.

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/narrow-1.c | 4 ++--
 gcc/tree-vect-patterns.cc                                   | 3 ++-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/narrow-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/narrow-1.c
index 3de8d85b52d..b12cb6355c8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/narrow-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/narrow-1.c
@@ -27,5 +27,5 @@
 
 TEST_ALL ()
 
-/* { dg-final { scan-assembler-times {\tvnsra\.wv} 6 } } */
-/* { dg-final { scan-assembler-times {\tvnsrl\.wv} 5 } } */
+/* { dg-final { scan-assembler-times {\tvnsra\.wv} 4 } } */
+/* { dg-final { scan-assembler-times {\tvnsrl\.wv} 4 } } */
diff --git a/gcc/tree-vect-patterns.cc b/gcc/tree-vect-patterns.cc
index 2cedf238450..cda27fed95b 100644
--- a/gcc/tree-vect-patterns.cc
+++ b/gcc/tree-vect-patterns.cc
@@ -3133,7 +3133,8 @@ vect_recog_over_widening_pattern (vec_info *vinfo,
 		return NULL;
 	    }
 	  else
-	    append_pattern_def_seq (vinfo, last_stmt_info, pattern_stmt);
+	    append_pattern_def_seq (vinfo, last_stmt_info, pattern_stmt,
+				    op_vectype);
 	  ops[1] = new_var;
 	}
     }

                 reply	other threads:[~2023-08-07 10:15 UTC|newest]

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