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* [gcc r13-7701] Workaround possible CPUID bug in Sandy Bridge.
@ 2023-08-09 7:48 hongtao Liu
0 siblings, 0 replies; only message in thread
From: hongtao Liu @ 2023-08-09 7:48 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b37a524d9e9f3aebd1a74ef95c9f1656a35fa336
commit r13-7701-gb37a524d9e9f3aebd1a74ef95c9f1656a35fa336
Author: liuhongt <hongtao.liu@intel.com>
Date: Fri Aug 4 09:27:39 2023 +0800
Workaround possible CPUID bug in Sandy Bridge.
Don't access leaf 7 subleaf 1 unless subleaf 0 says it is
supported via EAX.
Intel documentation says invalid subleaves return 0. We had been
relying on that behavior instead of checking the max sublef number.
It appears that some Sandy Bridge CPUs return at least the subleaf 0
EDX value for subleaf 1. Best guess is that this is a bug in a
microcode patch since all of the bits we're seeing set in EDX were
introduced after Sandy Bridge was originally released.
This is causing avxvnniint16 to be incorrectly enabled with
-march=native on these CPUs.
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features): Check
max_subleaf_level for valid subleaf before use CPUID.
Diff:
---
gcc/common/config/i386/cpuinfo.h | 67 +++++++++++++++++++++-------------------
1 file changed, 36 insertions(+), 31 deletions(-)
diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h
index dc5886e5e643..81f8b1766f8d 100644
--- a/gcc/common/config/i386/cpuinfo.h
+++ b/gcc/common/config/i386/cpuinfo.h
@@ -745,7 +745,9 @@ get_available_features (struct __processor_model *cpu_model,
/* Get Advanced Features at level 7 (eax = 7, ecx = 0/1). */
if (max_cpuid_level >= 7)
{
- __cpuid_count (7, 0, eax, ebx, ecx, edx);
+ unsigned int max_subleaf_level;
+
+ __cpuid_count (7, 0, max_subleaf_level, ebx, ecx, edx);
if (ebx & bit_BMI)
set_feature (FEATURE_BMI);
if (ebx & bit_SGX)
@@ -857,37 +859,40 @@ get_available_features (struct __processor_model *cpu_model,
set_feature (FEATURE_AVX512FP16);
}
- __cpuid_count (7, 1, eax, ebx, ecx, edx);
- if (eax & bit_HRESET)
- set_feature (FEATURE_HRESET);
- if (eax & bit_CMPCCXADD)
- set_feature(FEATURE_CMPCCXADD);
- if (edx & bit_PREFETCHI)
- set_feature (FEATURE_PREFETCHI);
- if (eax & bit_RAOINT)
- set_feature (FEATURE_RAOINT);
- if (avx_usable)
- {
- if (eax & bit_AVXVNNI)
- set_feature (FEATURE_AVXVNNI);
- if (eax & bit_AVXIFMA)
- set_feature (FEATURE_AVXIFMA);
- if (edx & bit_AVXVNNIINT8)
- set_feature (FEATURE_AVXVNNIINT8);
- if (edx & bit_AVXNECONVERT)
- set_feature (FEATURE_AVXNECONVERT);
- }
- if (avx512_usable)
- {
- if (eax & bit_AVX512BF16)
- set_feature (FEATURE_AVX512BF16);
- }
- if (amx_usable)
+ if (max_subleaf_level >= 1)
{
- if (eax & bit_AMX_FP16)
- set_feature (FEATURE_AMX_FP16);
- if (edx & bit_AMX_COMPLEX)
- set_feature (FEATURE_AMX_COMPLEX);
+ __cpuid_count (7, 1, eax, ebx, ecx, edx);
+ if (eax & bit_HRESET)
+ set_feature (FEATURE_HRESET);
+ if (eax & bit_CMPCCXADD)
+ set_feature(FEATURE_CMPCCXADD);
+ if (edx & bit_PREFETCHI)
+ set_feature (FEATURE_PREFETCHI);
+ if (eax & bit_RAOINT)
+ set_feature (FEATURE_RAOINT);
+ if (avx_usable)
+ {
+ if (eax & bit_AVXVNNI)
+ set_feature (FEATURE_AVXVNNI);
+ if (eax & bit_AVXIFMA)
+ set_feature (FEATURE_AVXIFMA);
+ if (edx & bit_AVXVNNIINT8)
+ set_feature (FEATURE_AVXVNNIINT8);
+ if (edx & bit_AVXNECONVERT)
+ set_feature (FEATURE_AVXNECONVERT);
+ }
+ if (avx512_usable)
+ {
+ if (eax & bit_AVX512BF16)
+ set_feature (FEATURE_AVX512BF16);
+ }
+ if (amx_usable)
+ {
+ if (eax & bit_AMX_FP16)
+ set_feature (FEATURE_AMX_FP16);
+ if (edx & bit_AMX_COMPLEX)
+ set_feature (FEATURE_AMX_COMPLEX);
+ }
}
}
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