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From: Uros Bizjak <uros@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-3471] i386: Optimize pinsrq of 0 with index 1 into movq [PR94866] Date: Thu, 24 Aug 2023 20:25:06 +0000 (GMT) [thread overview] Message-ID: <20230824202506.D19C43858C53@sourceware.org> (raw) https://gcc.gnu.org/g:6dd73f0f00f454a05552b008a1d56560bd3f1d4a commit r14-3471-g6dd73f0f00f454a05552b008a1d56560bd3f1d4a Author: Uros Bizjak <ubizjak@gmail.com> Date: Thu Aug 24 22:23:52 2023 +0200 i386: Optimize pinsrq of 0 with index 1 into movq [PR94866] Add new pattern involving vec_merge RTX that is produced by combine from the combination of sse4_1_pinsrq and *movdi_internal: 7: r86:DI=0 8: r85:V2DI=vec_merge(vec_duplicate(r86:DI),r87:V2DI,0x2) REG_DEAD r87:V2DI REG_DEAD r86:DI Successfully matched this instruction: (set (reg:V2DI 85 [ a ]) (vec_merge:V2DI (reg:V2DI 87) (const_vector:V2DI [ (const_int 0 [0]) repeated x2 ]) (const_int 1 [0x1]))) PR target/94866 gcc/ChangeLog: * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern. gcc/testsuite/ChangeLog: * g++.target/i386/pr94866.C: New test. Diff: --- gcc/config/i386/sse.md | 12 ++++++++++++ gcc/testsuite/g++.target/i386/pr94866.C | 13 +++++++++++++ 2 files changed, 25 insertions(+) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index fb3db940d3d2..59a0eb1c63f3 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1720,6 +1720,18 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "TI")]) +(define_insn "*sse2_movq128_<mode>_1" + [(set (match_operand:VI8F_128 0 "register_operand" "=v") + (vec_merge:VI8F_128 + (match_operand:VI8F_128 1 "nonimmediate_operand" "vm") + (match_operand:VI8F_128 2 "const0_operand") + (const_int 1)))] + "TARGET_SSE2" + "%vmovq\t{%1, %0|%0, %q1}" + [(set_attr "type" "ssemov") + (set_attr "prefix" "maybe_vex") + (set_attr "mode" "TI")]) + ;; Move a DI from a 32-bit register pair (e.g. %edx:%eax) to an xmm. ;; We'd rather avoid this entirely; if the 32-bit reg pair was loaded ;; from memory, we'd prefer to load the memory directly into the %xmm diff --git a/gcc/testsuite/g++.target/i386/pr94866.C b/gcc/testsuite/g++.target/i386/pr94866.C new file mode 100644 index 000000000000..eb0f5ef11c56 --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr94866.C @@ -0,0 +1,13 @@ +// PR target/94866 +// { dg-do compile } +// { dg-options "-O2 -msse4.1" } +// { dg-require-effective-target c++11 } + +typedef long long v2di __attribute__((vector_size(16))); + +v2di _mm_move_epi64(v2di a) +{ + return v2di{a[0], 0LL}; +} + +// { dg-final { scan-assembler-times "movq\[ \\t\]+\[^\n\]*%xmm" 1 } }
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