public inbox for gcc-cvs@sourceware.org help / color / mirror / Atom feed
From: Pan Li <panli@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-3645] RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic Date: Mon, 4 Sep 2023 07:45:44 +0000 (GMT) [thread overview] Message-ID: <20230904074544.78A723858D33@sourceware.org> (raw) https://gcc.gnu.org/g:d99a868a9b100ab5a4b270a1acece60b5b6153a3 commit r14-3645-gd99a868a9b100ab5a4b270a1acece60b5b6153a3 Author: Pan Li <pan2.li@intel.com> Date: Mon Sep 4 15:14:28 2023 +0800 RISC-V: Support FP16 for RVV VRGATHEREI16 intrinsic This patch would like to add FP16 support for the VRGATHEREI16 intrinsic. Aka: * __riscv_vrgatherei16_vv_f16mf4 * __riscv_vrgatherei16_vv_f16mf4_m As well as f16mf2 to f16m8 types. Signed-off-by: Pan Li <pan2.li@intel.com> gcc/ChangeLog: * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4_t): Add FP16 intrinsic def. (vfloat16mf2_t): Ditto. (vfloat16m1_t): Ditto. (vfloat16m2_t): Ditto. (vfloat16m4_t): Ditto. (vfloat16m8_t): Ditto. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/intrisinc-vrgatherei16.c: New test. Diff: --- gcc/config/riscv/riscv-vector-builtins-types.def | 9 +++++++ .../gcc.target/riscv/rvv/intrisinc-vrgatherei16.c | 28 ++++++++++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/gcc/config/riscv/riscv-vector-builtins-types.def b/gcc/config/riscv/riscv-vector-builtins-types.def index 1c3cc0eb222d..6aa45ae9a7e5 100644 --- a/gcc/config/riscv/riscv-vector-builtins-types.def +++ b/gcc/config/riscv/riscv-vector-builtins-types.def @@ -689,11 +689,20 @@ DEF_RVV_EI16_OPS (vuint64m1_t, RVV_REQUIRE_ELEN_64) DEF_RVV_EI16_OPS (vuint64m2_t, RVV_REQUIRE_ELEN_64) DEF_RVV_EI16_OPS (vuint64m4_t, RVV_REQUIRE_ELEN_64) DEF_RVV_EI16_OPS (vuint64m8_t, RVV_REQUIRE_ELEN_64) + +DEF_RVV_EI16_OPS (vfloat16mf4_t, RVV_REQUIRE_ELEN_FP_16 | RVV_REQUIRE_MIN_VLEN_64) +DEF_RVV_EI16_OPS (vfloat16mf2_t, RVV_REQUIRE_ELEN_FP_16) +DEF_RVV_EI16_OPS (vfloat16m1_t, RVV_REQUIRE_ELEN_FP_16) +DEF_RVV_EI16_OPS (vfloat16m2_t, RVV_REQUIRE_ELEN_FP_16) +DEF_RVV_EI16_OPS (vfloat16m4_t, RVV_REQUIRE_ELEN_FP_16) +DEF_RVV_EI16_OPS (vfloat16m8_t, RVV_REQUIRE_ELEN_FP_16) + DEF_RVV_EI16_OPS (vfloat32mf2_t, RVV_REQUIRE_ELEN_FP_32 | RVV_REQUIRE_MIN_VLEN_64) DEF_RVV_EI16_OPS (vfloat32m1_t, RVV_REQUIRE_ELEN_FP_32) DEF_RVV_EI16_OPS (vfloat32m2_t, RVV_REQUIRE_ELEN_FP_32) DEF_RVV_EI16_OPS (vfloat32m4_t, RVV_REQUIRE_ELEN_FP_32) DEF_RVV_EI16_OPS (vfloat32m8_t, RVV_REQUIRE_ELEN_FP_32) + DEF_RVV_EI16_OPS (vfloat64m1_t, RVV_REQUIRE_ELEN_FP_64) DEF_RVV_EI16_OPS (vfloat64m2_t, RVV_REQUIRE_ELEN_FP_64) DEF_RVV_EI16_OPS (vfloat64m4_t, RVV_REQUIRE_ELEN_FP_64) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/intrisinc-vrgatherei16.c b/gcc/testsuite/gcc.target/riscv/rvv/intrisinc-vrgatherei16.c new file mode 100644 index 000000000000..59c6d7c887d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/intrisinc-vrgatherei16.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv_zvfh -mabi=lp64 -O3 -Wno-psabi" } */ + +#include "riscv_vector.h" + +typedef _Float16 float16_t; + +vfloat16mf4_t test_vrgatherei16_vv_f16mf4(vfloat16mf4_t op1, vuint16mf4_t op2, + size_t vl) { + return __riscv_vrgatherei16_vv_f16mf4(op1, op2, vl); +} + +vfloat16m8_t test_vrgatherei16_vv_f16m8(vfloat16m8_t op1, vuint16m8_t op2, + size_t vl) { + return __riscv_vrgatherei16_vv_f16m8(op1, op2, vl); +} + +vfloat16mf4_t test_vrgatherei16_vv_f16mf4_m(vbool64_t mask, vfloat16mf4_t op1, + vuint16mf4_t op2, size_t vl) { + return __riscv_vrgatherei16_vv_f16mf4_m(mask, op1, op2, vl); +} + +vfloat16m8_t test_vrgatherei16_vv_f16m8_m(vbool2_t mask, vfloat16m8_t op1, + vuint16m8_t op2, size_t vl) { + return __riscv_vrgatherei16_vv_f16m8_m(mask, op1, op2, vl); +} + +/* { dg-final { scan-assembler-times {vrgatherei16.vv\s+v[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 4 } } */
reply other threads:[~2023-09-04 7:45 UTC|newest] Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20230904074544.78A723858D33@sourceware.org \ --to=panli@gcc.gnu.org \ --cc=gcc-cvs@gcc.gnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).