[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Make sure we get VL REG operand for VLMAX vsetvl

[gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Make sure we get VL REG operand for VLMAX vsetvl

[Jeff Law]

https://gcc.gnu.org/g:887542f2d2bf4dc1ae6a60bd69419a42d120884f

commit 887542f2d2bf4dc1ae6a60bd69419a42d120884f
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Wed Aug 30 10:22:11 2023 +0800

    RISC-V: Make sure we get VL REG operand for VLMAX vsetvl
    
    Fix ICE in "vect" testsuite:
    
    FAIL: gcc.dg/vect/pr64495.c (internal compiler error: in df_uses_record, at df-scan.cc:2958)
    FAIL: gcc.dg/vect/pr64495.c (test for excess errors
    
    After this patch, all current found VSETVL PASS related bugs in "vect" are fixed.
    
    gcc/ChangeLog:
    
            * config/riscv/riscv-vsetvl.cc
            (vector_insn_info::get_avl_or_vl_reg): Fix bug.
    
    (cherry picked from commit 7accc6208befae77699a56f67a94da1e247ed069)

Diff:
---
 gcc/config/riscv/riscv-vsetvl.cc | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc
index 73d672b083b4..1386d9250ca0 100644
--- a/gcc/config/riscv/riscv-vsetvl.cc
+++ b/gcc/config/riscv/riscv-vsetvl.cc
@@ -2300,18 +2300,26 @@ vector_insn_info::get_avl_or_vl_reg (void) const
   if (!vlmax_avl_p (get_avl ()))
     return get_avl ();
 
-  if (has_vl_op (get_insn ()->rtl ()) || vsetvl_insn_p (get_insn ()->rtl ()))
-    return ::get_vl (get_insn ()->rtl ());
-
   if (get_avl_source ())
     return get_avl_reg_rtx ();
 
+  rtx_insn *rinsn = get_insn ()->rtl ();
+  if (has_vl_op (rinsn) || vsetvl_insn_p (rinsn))
+    {
+      rtx vl = ::get_vl (rinsn);
+      /* For VLMAX, we should make sure we get the
+	 REG to emit 'vsetvl VL,zero' since the 'VL'
+	 should be the REG according to RVV ISA.  */
+      if (REG_P (vl))
+	return vl;
+    }
+
   /* A DIRTY (polluted EMPTY) block if:
        - get_insn is scalar move (no AVL or VL operand).
        - get_avl_source is null (no def in the current DIRTY block).
      Then we trace the previous insn which must be the insn
      already inserted in Phase 2 to get the VL operand for VLMAX.  */
-  rtx_insn *prev_rinsn = PREV_INSN (get_insn ()->rtl ());
+  rtx_insn *prev_rinsn = PREV_INSN (rinsn);
   gcc_assert (prev_rinsn && vsetvl_insn_p (prev_rinsn));
   return ::get_vl (prev_rinsn);
 }