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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Make arch-24.c to test "success" case
@ 2023-09-11 13:33 Jeff Law
0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-09-11 13:33 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e8ec9036ff83010bb48e02e3b46e52acef33de9c
commit e8ec9036ff83010bb48e02e3b46e52acef33de9c
Author: Tsukasa OI <research_trasio@irq.a4lg.com>
Date: Tue Aug 29 02:41:44 2023 +0000
RISC-V: Make arch-24.c to test "success" case
arch-24.c and arch-25.c are exactly the same and redundant. The author
suspects that the original author intended to test two base ISAs (RV32I and
RV64I) so this commit changes arch-24.c to test that RV32I+Zcf does not
cause any errors.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-24.c: Test RV32I+Zcf instead.
(cherry picked from commit a248e1cc860821b96a42be96478257c4964a7c2a)
Diff:
---
gcc/testsuite/gcc.target/riscv/arch-24.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/arch-24.c b/gcc/testsuite/gcc.target/riscv/arch-24.c
index 3be4ade65a77..af15c3234b5e 100644
--- a/gcc/testsuite/gcc.target/riscv/arch-24.c
+++ b/gcc/testsuite/gcc.target/riscv/arch-24.c
@@ -1,5 +1,3 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64i_zcf -mabi=lp64" } */
+/* { dg-options "-march=rv32i_zcf -mabi=ilp32" } */
int foo() {}
-/* { dg-error "'-march=rv64i_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */
-/* { dg-error "'-march=rv64i_zca_zcf': zcf extension supports in rv32 only" "" { target *-*-* } 0 } */
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