public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Add Types to Un-Typed Pic Instructions
@ 2023-09-11 13:36 Jeff Law
0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-09-11 13:36 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:06632e600ee6e3cc296c2180ea709013cb3a21cb
commit 06632e600ee6e3cc296c2180ea709013cb3a21cb
Author: Edwin Lu <ewlu@rivosinc.com>
Date: Tue Sep 5 10:01:26 2023 -0700
RISC-V: Add Types to Un-Typed Pic Instructions
Updates pic instructions to ensure that no instruction is left
without a type attribute.
Tested for regressions using rv32/64 multilib with newlib/linux.
gcc/Changelog:
* config/riscv/pic.md: Update types
Reviewed-by: Jeff Law <jlaw@ventanamicro.com>
Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
(cherry picked from commit c85db606d46774283ca4ec037dc3051719828f41)
Diff:
---
gcc/config/riscv/pic.md | 30 ++++++++++++++++++++----------
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/gcc/config/riscv/pic.md b/gcc/config/riscv/pic.md
index da636e31619e..cfaa670caf04 100644
--- a/gcc/config/riscv/pic.md
+++ b/gcc/config/riscv/pic.md
@@ -27,21 +27,24 @@
(mem:ANYI (match_operand 1 "absolute_symbolic_operand" "")))]
"USE_LOAD_ADDRESS_MACRO (operands[1])"
"<default_load>\t%0,%1"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "load")
+ (set (attr "length") (const_int 8))])
(define_insn "*local_pic_load_s<SUBX:mode>"
[(set (match_operand:SUPERQI 0 "register_operand" "=r")
(sign_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))]
"USE_LOAD_ADDRESS_MACRO (operands[1])"
"<SUBX:load>\t%0,%1"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "load")
+ (set (attr "length") (const_int 8))])
(define_insn "*local_pic_load_u<SUBX:mode>"
[(set (match_operand:SUPERQI 0 "register_operand" "=r")
(zero_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))]
"USE_LOAD_ADDRESS_MACRO (operands[1])"
"<SUBX:load>u\t%0,%1"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "load")
+ (set (attr "length") (const_int 8))])
;; We can support ANYLSF loads into X register if there is no double support
;; or if the target is 64-bit.
@@ -55,7 +58,8 @@
"@
<ANYLSF:load>\t%0,%1,%2
<softload>\t%0,%1"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "fpload")
+ (set (attr "length") (const_int 8))])
;; ??? For a 32-bit target with double float, a DF load into a X reg isn't
;; supported. ld is not valid in that case. Punt for now. Maybe add a split
@@ -68,14 +72,16 @@
"TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1])
&& (TARGET_DOUBLE_FLOAT && !TARGET_64BIT)"
"<ANYLSF:load>\t%0,%1,%2"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "fpload")
+ (set (attr "length") (const_int 8))])
(define_insn "*local_pic_load_sf<mode>"
[(set (match_operand:SOFTF 0 "register_operand" "=r")
(mem:SOFTF (match_operand 1 "absolute_symbolic_operand" "")))]
"!TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1])"
"<softload>\t%0,%1"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "fpload")
+ (set (attr "length") (const_int 8))])
;; Simplify PIC stores to static variables.
;; These should go away once we figure out how to emit auipc discretely.
@@ -86,7 +92,8 @@
(clobber (match_scratch:P 2 "=&r"))]
"USE_LOAD_ADDRESS_MACRO (operands[0])"
"<ANYI:store>\t%z1,%0,%2"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "store")
+ (set (attr "length") (const_int 8))])
(define_insn "*local_pic_store<ANYLSF:mode>"
[(set (mem:ANYLSF (match_operand 0 "absolute_symbolic_operand" ""))
@@ -97,7 +104,8 @@
"@
<ANYLSF:store>\t%1,%0,%2
<softstore>\t%1,%0,%2"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "fpstore")
+ (set (attr "length") (const_int 8))])
;; ??? For a 32-bit target with double float, a DF store from a X reg isn't
;; supported. sd is not valid in that case. Punt for now. Maybe add a split
@@ -110,7 +118,8 @@
"TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[1])
&& (TARGET_DOUBLE_FLOAT && !TARGET_64BIT)"
"<ANYLSF:store>\t%1,%0,%2"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "fpstore")
+ (set (attr "length") (const_int 8))])
(define_insn "*local_pic_store_sf<SOFTF:mode>"
[(set (mem:SOFTF (match_operand 0 "absolute_symbolic_operand" ""))
@@ -118,4 +127,5 @@
(clobber (match_scratch:P 2 "=&r"))]
"!TARGET_HARD_FLOAT && USE_LOAD_ADDRESS_MACRO (operands[0])"
"<softstore>\t%1,%0,%2"
- [(set (attr "length") (const_int 8))])
+ [(set_attr "type" "fpstore")
+ (set (attr "length") (const_int 8))])
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2023-09-11 13:36 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-11 13:36 [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Add Types to Un-Typed Pic Instructions Jeff Law
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).