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* [gcc(refs/vendors/riscv/heads/gcc-13-with-riscv-opts)] RISC-V: Fix VLS floating-point operations predicate
@ 2023-09-11 13:38 Jeff Law
  0 siblings, 0 replies; only message in thread
From: Jeff Law @ 2023-09-11 13:38 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:de30ec6d2e010d6fe50b959fa5a88b6c3434277f

commit de30ec6d2e010d6fe50b959fa5a88b6c3434277f
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Sat Sep 9 12:30:26 2023 +0800

    RISC-V: Fix VLS floating-point operations predicate
    
    VLS vfadd should depend on ZVFH instead of ZVFHMIN.
    Obvious fix and committed.
    
    gcc/ChangeLog:
    
            * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
    
    (cherry picked from commit df9a25384e6c484643b48b59b4e6e07504889b61)

Diff:
---
 gcc/config/riscv/vector-iterators.md | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/gcc/config/riscv/vector-iterators.md b/gcc/config/riscv/vector-iterators.md
index 7d9fcd23b498..a98ed9fcbb6f 100644
--- a/gcc/config/riscv/vector-iterators.md
+++ b/gcc/config/riscv/vector-iterators.md
@@ -456,18 +456,18 @@
   (RVVM8DF "TARGET_VECTOR_ELEN_FP_64") (RVVM4DF "TARGET_VECTOR_ELEN_FP_64")
   (RVVM2DF "TARGET_VECTOR_ELEN_FP_64") (RVVM1DF "TARGET_VECTOR_ELEN_FP_64")
 
-  (V1HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16")
-  (V2HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16")
-  (V4HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16")
-  (V8HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16")
-  (V16HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16")
-  (V32HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 64")
-  (V64HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 128")
-  (V128HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 256")
-  (V256HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 512")
-  (V512HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 1024")
-  (V1024HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 2048")
-  (V2048HF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_16 && TARGET_MIN_VLEN >= 4096")
+  (V1HF "TARGET_VECTOR_VLS && TARGET_ZVFH")
+  (V2HF "TARGET_VECTOR_VLS && TARGET_ZVFH")
+  (V4HF "TARGET_VECTOR_VLS && TARGET_ZVFH")
+  (V8HF "TARGET_VECTOR_VLS && TARGET_ZVFH")
+  (V16HF "TARGET_VECTOR_VLS && TARGET_ZVFH")
+  (V32HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 64")
+  (V64HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 128")
+  (V128HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 256")
+  (V256HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 512")
+  (V512HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 1024")
+  (V1024HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 2048")
+  (V2048HF "TARGET_VECTOR_VLS && TARGET_ZVFH && TARGET_MIN_VLEN >= 4096")
   (V1SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32")
   (V2SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32")
   (V4SF "TARGET_VECTOR_VLS && TARGET_VECTOR_ELEN_FP_32")

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