From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 7939) id 157243858417; Mon, 11 Sep 2023 17:02:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 157243858417 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1694451724; bh=HCFSLslX2gefE0AbcKToAIX75hxpciW+dBwVUJ1XyiU=; h=From:To:Subject:Date:From; b=e4dpn1eyFp+/95qtWdiRnCrXZ+HtY6PqHljl0X1Ls6ew5qwQD5zSY+uVh/MYA0Hek 8yf3u1iIax9DAU/Q6GCXIGDdOGnSpnDxmfgyAtkG/9mSuRXdmq8TJ1f5GUZjWsgCQs IwMREOIfLGLXeB21OkcCxIp2gnpc5IVDBTeHqdv0= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" From: Edwin Lu To: gcc-cvs@gcc.gnu.org Subject: [gcc r14-3851] RISC-V: Add Types to Un-Typed Zicond Instructions X-Act-Checkin: gcc X-Git-Author: Edwin Lu X-Git-Refname: refs/heads/master X-Git-Oldrev: d8751d9e32214380e6fdbb9e47f13192cc899469 X-Git-Newrev: 4074aede45e3d8fbdb8fe28e1f084e869d3546f5 Message-Id: <20230911170204.157243858417@sourceware.org> Date: Mon, 11 Sep 2023 17:02:04 +0000 (GMT) List-Id: https://gcc.gnu.org/g:4074aede45e3d8fbdb8fe28e1f084e869d3546f5 commit r14-3851-g4074aede45e3d8fbdb8fe28e1f084e869d3546f5 Author: Edwin Lu Date: Mon Sep 11 09:56:06 2023 -0700 RISC-V: Add Types to Un-Typed Zicond Instructions Creates a new "zicond" type and updates all zicond instructions with that type. gcc/ChangeLog: * config/riscv/riscv.md: Add "zicond" type * config/riscv/zicond.md: Update types Signed-off-by: Edwin Lu Diff: --- gcc/config/riscv/riscv.md | 3 ++- gcc/config/riscv/zicond.md | 8 ++++---- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index a6046c17fc31..01cf623c0482 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -318,6 +318,7 @@ ;; crypto cryptography instructions ;; pushpop zc push and pop instructions ;; mvpair zc move pair instructions +;; zicond zicond instructions ;; Classification of RVV instructions which will be added to each RVV .md pattern and used by scheduler. ;; rdvlenb vector byte length vlenb csrr read ;; rdvl vector length vl csrr read @@ -427,7 +428,7 @@ mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul, fmadd,fdiv,fcmp,fcvt,fsqrt,multi,auipc,sfb_alu,nop,trap,ghost,bitmanip, rotate,clmul,min,max,minu,maxu,clz,ctz,cpop, - atomic,condmove,cbo,crypto,pushpop,mvpair,rdvlenb,rdvl,wrvxrm,wrfrm, + atomic,condmove,cbo,crypto,pushpop,mvpair,zicond,rdvlenb,rdvl,wrvxrm,wrfrm, rdfrm,vsetvl,vlde,vste,vldm,vstm,vlds,vsts, vldux,vldox,vstux,vstox,vldff,vldr,vstr, vlsegde,vssegte,vlsegds,vssegts,vlsegdux,vlsegdox,vssegtux,vssegtox,vlsegdff, diff --git a/gcc/config/riscv/zicond.md b/gcc/config/riscv/zicond.md index 6627be3fa585..05e7348abba1 100644 --- a/gcc/config/riscv/zicond.md +++ b/gcc/config/riscv/zicond.md @@ -40,7 +40,7 @@ else gcc_unreachable (); } -) +[(set_attr "type" "zicond")]) (define_insn "*czero.." [(set (match_operand:GPR 0 "register_operand" "=r") @@ -57,7 +57,7 @@ else gcc_unreachable (); } -) +[(set_attr "type" "zicond")]) ;; Special optimization under eq/ne in primitive semantics (define_insn "*czero.eqz..opt1" @@ -75,7 +75,7 @@ else gcc_unreachable (); } -) +[(set_attr "type" "zicond")]) (define_insn "*czero.nez..opt2" [(set (match_operand:GPR 0 "register_operand" "=r") @@ -92,7 +92,7 @@ else gcc_unreachable (); } -) +[(set_attr "type" "zicond")]) ;; Combine creates this form in some cases (particularly the coremark ;; CRC loop).