[gcc r12-9854] rs6000: call vector load/store with length only on 64-bit Power10

[gcc r12-9854] rs6000: call vector load/store with length only on 64-bit Power10

[HaoChen Gui]

https://gcc.gnu.org/g:ac0773956cef18cd4903365fb675447ee301d725

commit r12-9854-gac0773956cef18cd4903365fb675447ee301d725
Author: Haochen Gui <guihaoc@gcc.gnu.org>
Date:   Tue Sep 12 09:56:13 2023 +0800

    rs6000: call vector load/store with length only on 64-bit Power10
    
    gcc/
            PR target/96762
            * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
            load/store with length only on 64-bit Power10.
    
    gcc/testsuite/
            PR target/96762
            * gcc.target/powerpc/pr96762.c: New.
    
    (cherry picked from commit 946b8967b905257ac9f140225db744c9a6ab91be)

Diff:
---
 gcc/config/rs6000/rs6000-string.cc         | 14 ++++++++++----
 gcc/testsuite/gcc.target/powerpc/pr96762.c | 13 +++++++++++++
 2 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-string.cc b/gcc/config/rs6000/rs6000-string.cc
index 59d901ac68d1..162f8562897f 100644
--- a/gcc/config/rs6000/rs6000-string.cc
+++ b/gcc/config/rs6000/rs6000-string.cc
@@ -2811,11 +2811,17 @@ expand_block_move (rtx operands[], bool might_overlap)
 	  gen_func.mov = gen_vsx_movv2di_64bit;
 	}
       else if (TARGET_BLOCK_OPS_UNALIGNED_VSX
-	       && TARGET_POWER10 && bytes < 16
+	       /* Only use lxvl/stxvl on 64bit POWER10.  */
+	       && TARGET_POWER10
+	       && TARGET_64BIT
+	       && bytes < 16
 	       && orig_bytes > 16
-	       && !(bytes == 1 || bytes == 2
-		    || bytes == 4 || bytes == 8)
-	       && (align >= 128 || !STRICT_ALIGNMENT))
+	       && !(bytes == 1
+		    || bytes == 2
+		    || bytes == 4
+		    || bytes == 8)
+	       && (align >= 128
+		   || !STRICT_ALIGNMENT))
 	{
 	  /* Only use lxvl/stxvl if it could replace multiple ordinary
 	     loads+stores.  Also don't use it unless we likely already
diff --git a/gcc/testsuite/gcc.target/powerpc/pr96762.c b/gcc/testsuite/gcc.target/powerpc/pr96762.c
new file mode 100644
index 000000000000..a59deb427386
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr96762.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Verify there is no ICE on ilp32 env.  */
+
+extern void foo (char *);
+
+void
+bar (void)
+{
+  char zj[] = "XXXXXXXXXXXXXXXX";
+  foo (zj);
+}