public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc(refs/vendors/ARM/heads/CVE-2023-4039/gcc-10)] aarch64: Remove below_hard_fp_saved_regs_size
@ 2023-09-12 15:25 Richard Sandiford
0 siblings, 0 replies; only message in thread
From: Richard Sandiford @ 2023-09-12 15:25 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:1c659316abe90c98b98494c9f13bd040e25063d8
commit 1c659316abe90c98b98494c9f13bd040e25063d8
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Thu Jun 22 22:15:39 2023 +0100
aarch64: Remove below_hard_fp_saved_regs_size
After previous patches, it's no longer necessary to store
saved_regs_size and below_hard_fp_saved_regs_size in the frame info.
All measurements instead use the top or bottom of the frame as
reference points.
gcc/
* config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
(aarch64_frame::below_hard_fp_saved_regs_size): Delete.
* config/aarch64/aarch64.c (aarch64_layout_frame): Update accordingly.
Diff:
---
gcc/config/aarch64/aarch64.c | 46 +++++++++++++++++++++-----------------------
gcc/config/aarch64/aarch64.h | 7 -------
2 files changed, 22 insertions(+), 31 deletions(-)
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 2dea9b5617d3..91833473c751 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -6955,9 +6955,9 @@ aarch64_layout_frame (void)
/* OFFSET is now the offset of the hard frame pointer from the bottom
of the callee save area. */
- frame.below_hard_fp_saved_regs_size = offset - frame.bytes_below_saved_regs;
- bool saves_below_hard_fp_p
- = maybe_ne (frame.below_hard_fp_saved_regs_size, 0);
+ poly_int64 below_hard_fp_saved_regs_size
+ = offset - frame.bytes_below_saved_regs;
+ bool saves_below_hard_fp_p = maybe_ne (below_hard_fp_saved_regs_size, 0);
gcc_assert (!saves_below_hard_fp_p
|| (frame.sve_save_and_probe != INVALID_REGNUM
&& known_eq (frame.reg_offset[frame.sve_save_and_probe],
@@ -7031,9 +7031,8 @@ aarch64_layout_frame (void)
offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
- frame.saved_regs_size = offset - frame.bytes_below_saved_regs;
- gcc_assert (known_eq (frame.saved_regs_size,
- frame.below_hard_fp_saved_regs_size)
+ poly_int64 saved_regs_size = offset - frame.bytes_below_saved_regs;
+ gcc_assert (known_eq (saved_regs_size, below_hard_fp_saved_regs_size)
|| (frame.hard_fp_save_and_probe != INVALID_REGNUM
&& known_eq (frame.reg_offset[frame.hard_fp_save_and_probe],
frame.bytes_below_hard_fp)));
@@ -7042,7 +7041,7 @@ aarch64_layout_frame (void)
The saving of the bottommost register counts as an implicit probe,
which allows us to maintain the invariant described in the comment
at expand_prologue. */
- gcc_assert (crtl->is_leaf || maybe_ne (frame.saved_regs_size, 0));
+ gcc_assert (crtl->is_leaf || maybe_ne (saved_regs_size, 0));
offset += get_frame_size ();
offset = aligned_upper_bound (offset, STACK_BOUNDARY / BITS_PER_UNIT);
@@ -7068,7 +7067,7 @@ aarch64_layout_frame (void)
HOST_WIDE_INT const_size, const_below_saved_regs, const_above_fp;
HOST_WIDE_INT const_saved_regs_size;
- if (known_eq (frame.saved_regs_size, 0))
+ if (known_eq (saved_regs_size, 0))
frame.initial_adjust = frame.frame_size;
else if (frame.frame_size.is_constant (&const_size)
&& const_size < max_push_offset
@@ -7081,7 +7080,7 @@ aarch64_layout_frame (void)
frame.callee_adjust = const_size;
}
else if (frame.bytes_below_saved_regs.is_constant (&const_below_saved_regs)
- && frame.saved_regs_size.is_constant (&const_saved_regs_size)
+ && saved_regs_size.is_constant (&const_saved_regs_size)
&& const_below_saved_regs + const_saved_regs_size < 512
/* We could handle this case even with data below the saved
registers, provided that that data left us with valid offsets
@@ -7100,8 +7099,7 @@ aarch64_layout_frame (void)
frame.initial_adjust = frame.frame_size;
}
else if (saves_below_hard_fp_p
- && known_eq (frame.saved_regs_size,
- frame.below_hard_fp_saved_regs_size))
+ && known_eq (saved_regs_size, below_hard_fp_saved_regs_size))
{
/* Frame in which all saves are SVE saves:
@@ -7123,7 +7121,7 @@ aarch64_layout_frame (void)
[save SVE registers relative to SP]
sub sp, sp, bytes_below_saved_regs */
frame.callee_adjust = const_above_fp;
- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size;
frame.final_adjust = frame.bytes_below_saved_regs;
}
else
@@ -7138,7 +7136,7 @@ aarch64_layout_frame (void)
[save SVE registers relative to SP]
sub sp, sp, bytes_below_saved_regs */
frame.initial_adjust = frame.bytes_above_hard_fp;
- frame.sve_callee_adjust = frame.below_hard_fp_saved_regs_size;
+ frame.sve_callee_adjust = below_hard_fp_saved_regs_size;
frame.final_adjust = frame.bytes_below_saved_regs;
}
@@ -8252,17 +8250,17 @@ aarch64_epilogue_uses (int regno)
| local variables | <-- frame_pointer_rtx
| |
+-------------------------------+
- | padding | \
- +-------------------------------+ |
- | callee-saved registers | | frame.saved_regs_size
- +-------------------------------+ |
- | LR' | |
- +-------------------------------+ |
- | FP' | |
- +-------------------------------+ |<- hard_frame_pointer_rtx (aligned)
- | SVE vector registers | | \
- +-------------------------------+ | | below_hard_fp_saved_regs_size
- | SVE predicate registers | / /
+ | padding |
+ +-------------------------------+
+ | callee-saved registers |
+ +-------------------------------+
+ | LR' |
+ +-------------------------------+
+ | FP' |
+ +-------------------------------+ <-- hard_frame_pointer_rtx (aligned)
+ | SVE vector registers |
+ +-------------------------------+
+ | SVE predicate registers |
+-------------------------------+
| dynamic allocation |
+-------------------------------+
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 5279503fd090..b0d13cf08ece 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -820,18 +820,11 @@ struct GTY (()) aarch64_frame
STACK_BOUNDARY. */
HOST_WIDE_INT saved_varargs_size;
- /* The size of the callee-save registers with a slot in REG_OFFSET. */
- poly_int64 saved_regs_size;
-
/* The number of bytes between the bottom of the static frame (the bottom
of the outgoing arguments) and the bottom of the register save area.
This value is always a multiple of STACK_BOUNDARY. */
poly_int64 bytes_below_saved_regs;
- /* The size of the callee-save registers with a slot in REG_OFFSET that
- are saved below the hard frame pointer. */
- poly_int64 below_hard_fp_saved_regs_size;
-
/* The number of bytes between the bottom of the static frame (the bottom
of the outgoing arguments) and the hard frame pointer. This value is
always a multiple of STACK_BOUNDARY. */
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2023-09-12 15:25 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-09-12 15:25 [gcc(refs/vendors/ARM/heads/CVE-2023-4039/gcc-10)] aarch64: Remove below_hard_fp_saved_regs_size Richard Sandiford
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).