[gcc(refs/users/meissner/heads/work134)] Replace UNSPEC_COPYSIGN with copysign RTL

[gcc(refs/users/meissner/heads/work134)] Replace UNSPEC_COPYSIGN with copysign RTL

[Michael Meissner]

https://gcc.gnu.org/g:3791e8fc97cc932fd04edbb3352b34fd918ab826

commit 3791e8fc97cc932fd04edbb3352b34fd918ab826
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Sep 15 13:05:51 2023 -0400

    Replace UNSPEC_COPYSIGN with copysign RTL
    
    When I first implemented COPYSIGN support in the power7 days, we did not have a
    copysign RTL insn, so I had to use UNSPEC to represent the copysign
    instruction.  This patch removes those UNSPECs, and it uses the native RTL
    copysign insn.
    
    2023-09-15  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
            (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
            (copysign<mode>3_hard): Likewise.
            (copysign<mode>3_soft): Likewise.
            * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
            instead of UNSPEC.
            * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
            of UNSPEC.

Diff:
---
 gcc/config/rs6000/rs6000.md | 20 ++++++++------------
 gcc/config/rs6000/vector.md |  4 ++--
 gcc/config/rs6000/vsx.md    |  7 +++----
 3 files changed, 13 insertions(+), 18 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 1a9a7b1a479..9cb14bfcb7f 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -108,7 +108,6 @@
    UNSPEC_TOCREL
    UNSPEC_MACHOPIC_OFFSET
    UNSPEC_BPERM
-   UNSPEC_COPYSIGN
    UNSPEC_PARITY
    UNSPEC_CMPB
    UNSPEC_FCTIW
@@ -5353,9 +5352,8 @@
 ;; compiler from optimizing -0.0
 (define_insn "copysign<mode>3_fcpsgn"
   [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,wa")
-	(unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "d,wa")
-		      (match_operand:SFDF 2 "gpc_reg_operand" "d,wa")]
-		     UNSPEC_COPYSIGN))]
+	(copysign:SFDF (match_operand:SFDF 1 "gpc_reg_operand" "d,wa") 
+		       (match_operand:SFDF 2 "gpc_reg_operand" "d,wa")))]
   "TARGET_HARD_FLOAT && (TARGET_CMPB || VECTOR_UNIT_VSX_P (<MODE>mode))"
   "@
    fcpsgn %0,%2,%1
@@ -14954,10 +14952,9 @@
 
 (define_insn "copysign<mode>3_hard"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-	(unspec:IEEE128
-	 [(match_operand:IEEE128 1 "altivec_register_operand" "v")
-	  (match_operand:IEEE128 2 "altivec_register_operand" "v")]
-	 UNSPEC_COPYSIGN))]
+	(copysign:IEEE128
+	 (match_operand:IEEE128 1 "altivec_register_operand" "v")
+	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))]
   "TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
    "xscpsgnqp %0,%2,%1"
   [(set_attr "type" "vecmove")
@@ -14965,10 +14962,9 @@
 
 (define_insn "copysign<mode>3_soft"
   [(set (match_operand:IEEE128 0 "altivec_register_operand" "=v")
-	(unspec:IEEE128
-	 [(match_operand:IEEE128 1 "altivec_register_operand" "v")
-	  (match_operand:IEEE128 2 "altivec_register_operand" "v")]
-	 UNSPEC_COPYSIGN))
+	(copysign:IEEE128
+	 (match_operand:IEEE128 1 "altivec_register_operand" "v")
+	 (match_operand:IEEE128 2 "altivec_register_operand" "v")))
    (clobber (match_scratch:IEEE128 3 "=&v"))]
   "!TARGET_FLOAT128_HW && FLOAT128_IEEE_P (<MODE>mode)"
    "xscpsgndp %x3,%x2,%x1\;xxpermdi %x0,%x3,%x1,1"
diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md
index 1ae04c8e0a8..f4fc620b653 100644
--- a/gcc/config/rs6000/vector.md
+++ b/gcc/config/rs6000/vector.md
@@ -332,8 +332,8 @@
 
 (define_expand "vector_copysign<mode>3"
   [(set (match_operand:VEC_F 0 "vfloat_operand")
-	(unspec:VEC_F [(match_operand:VEC_F 1 "vfloat_operand")
-		       (match_operand:VEC_F 2 "vfloat_operand")] UNSPEC_COPYSIGN))]
+	(copysign:VEC_F (match_operand:VEC_F 1 "vfloat_operand")
+			(match_operand:VEC_F 2 "vfloat_operand")))]
   "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
 {
   if (<MODE>mode == V4SFmode && VECTOR_UNIT_ALTIVEC_P (<MODE>mode))
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 19abfeb565a..9011a3f7e40 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -2233,10 +2233,9 @@
 ;; Copy sign
 (define_insn "vsx_copysign<mode>3"
   [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa")
-	(unspec:VSX_F
-	 [(match_operand:VSX_F 1 "vsx_register_operand" "wa")
-	  (match_operand:VSX_F 2 "vsx_register_operand" "wa")]
-	 UNSPEC_COPYSIGN))]
+	(copysign:VSX_F
+	 (match_operand:VSX_F 1 "vsx_register_operand" "wa")
+	 (match_operand:VSX_F 2 "vsx_register_operand" "wa")))]
   "VECTOR_UNIT_VSX_P (<MODE>mode)"
   "xvcpsgn<sd>p %x0,%x2,%x1"
   [(set_attr "type" "<VStype_simple>")])